On Thu, Sep 26, 2013 at 12:33:20PM -0700, Jesse Barnes wrote: > And add some reg defines while we're at it. Since the units of the RC6 > residency counter are actually in CZ clocks, we want to just use the > high bits or we'll overflow too frequently. > > Signed-off-by: Jesse Barnes <jbarnes@xxxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_reg.h | 4 ++++ > drivers/gpu/drm/i915/intel_pm.c | 5 ++++- > 2 files changed, 8 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 00fda45..cf995bb 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -4721,6 +4721,10 @@ > GEN6_PM_RP_DOWN_TIMEOUT) > > #define GEN6_GT_GFX_RC6_LOCKED 0x138104 > +#define VLV_COUNTER_CONTROL 0x138104 > +#define VLV_COUNT_RANGE_HIGH (1<<15) > +#define VLV_MEDIA_RC6_COUNT_EN (1<<1) > +#define VLV_RENDER_RC6_COUNT_EN (1<<0) > #define GEN6_GT_GFX_RC6 0x138108 > #define GEN6_GT_GFX_RC6p 0x13810C > #define GEN6_GT_GFX_RC6pp 0x138110 > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index d27eda6..d8bdc98 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -3827,7 +3827,10 @@ static void valleyview_enable_rps(struct drm_device *dev) > I915_WRITE(GEN6_RC6_THRESHOLD, 0xc350); > > /* allows RC6 residency counter to work */ > - I915_WRITE(0x138104, _MASKED_BIT_ENABLE(0x3)); > + I915_WRITE(VLV_COUNTER_CONTROL, > + _MASKED_BIT_ENABLE(VLV_COUNT_RANGE_HIGH | > + VLV_MEDIA_RC6_COUNT_EN | > + VLV_RENDER_RC6_COUNT_EN)); > if (intel_enable_rc6(dev) & INTEL_RC6_ENABLE) > rc6_mode = GEN7_RC_CTL_TO_MODE; > I915_WRITE(GEN6_RC_CONTROL, rc6_mode); I wonder if the counters use power ie. only enable them when we are using rc6. Otherwise, it's: Requested-by: Ben Widawsky <ben@xxxxxxxxxxxx> Reviewed-by: Ben Widawsky <ben@xxxxxxxxxxxx> -- Ben Widawsky, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
