Re: [PATCH] drm/i915/gt: Temporarily disable CPU caching into DMA for MTL

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Hi Jonathan,

On Thu, Nov 02, 2023 at 10:58:31AM -0700, Jonathan Cavitt wrote:
> FIXME: It is suspected that some Address Translation Service (ATS)
> issue on IOMMU is causing CAT errors to occur on some MTL workloads.
> Applying a write barrier to the ppgtt set entry functions appeared
> to have no effect, so we must temporarily use I915_MAP_WC in the
> map_pt_dma class of functions on MTL until a proper ATS solution is
> found.
> 
> Signed-off-by: Jonathan Cavitt <jonathan.cavitt@xxxxxxxxx>
> CC: Chris Wilson <chris.p.wilson@xxxxxxxxxxxxxxx>

acked and pushed!

Thanks!
Andi



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