> -----Original Message----- > From: Manna, Animesh <animesh.manna@xxxxxxxxx> > Sent: Tuesday, October 17, 2023 1:52 PM > To: Murthy, Arun R <arun.r.murthy@xxxxxxxxx>; intel-gfx@xxxxxxxxxxxxxxxxxxxxx > Cc: dri-devel@xxxxxxxxxxxxxxxxxxxxx; Hogander, Jouni > <jouni.hogander@xxxxxxxxx>; Nikula, Jani <jani.nikula@xxxxxxxxx> > Subject: RE: [PATCH v7 4/6] drm/i915/panelreplay: Enable panel replay dpcd > initialization for DP > > > > > -----Original Message----- > > From: Murthy, Arun R <arun.r.murthy@xxxxxxxxx> > > Sent: Monday, October 16, 2023 9:56 AM > > To: Manna, Animesh <animesh.manna@xxxxxxxxx>; intel- > > gfx@xxxxxxxxxxxxxxxxxxxxx > > Cc: dri-devel@xxxxxxxxxxxxxxxxxxxxx; Hogander, Jouni > > <jouni.hogander@xxxxxxxxx>; Nikula, Jani <jani.nikula@xxxxxxxxx> > > Subject: RE: [PATCH v7 4/6] drm/i915/panelreplay: Enable panel replay > > dpcd initialization for DP > > > > > > > -----Original Message----- > > > From: Manna, Animesh <animesh.manna@xxxxxxxxx> > > > Sent: Wednesday, October 11, 2023 4:40 PM > > > To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx > > > Cc: dri-devel@xxxxxxxxxxxxxxxxxxxxx; Manna, Animesh > > > <animesh.manna@xxxxxxxxx>; Hogander, Jouni > > <jouni.hogander@xxxxxxxxx>; > > > Murthy, Arun R <arun.r.murthy@xxxxxxxxx>; Nikula, Jani > > > <jani.nikula@xxxxxxxxx> > > > Subject: [PATCH v7 4/6] drm/i915/panelreplay: Enable panel replay > > > dpcd initialization for DP > > > > > > Due to similarity panel replay dpcd initialization got added in psr > > > function which is specific for edp panel. This patch enables panel > > > replay initialization for dp connector. > > > > > If panelreplay initialization then why is the function name psr_init_dpcd() ? > > Also it its similar to PSR then these dpcd should already be available. > > Hi Arun, > > The first call for intel_psr_init_dpcd() get called from intel_edp_init_dpcd() > which is not reachable for DP. > So, in this patch need to add intel_psr_init_dpcd() for DP(non-edp) in > intel_psr_init(). > Panel replay initialization added in intel_psr_init() as per previous feedback just > to align panel-replay with psr framework. > Reviewed-by: Arun R Murthy <arun.r.murthy@xxxxxxxxx> Thanks and Regards, Arun R Murthy ------------------- > Regards, > Animesh > > > > Thanks and Regards, > > Arun R Murthy > > -------------------- > > > > > Cc: Jouni Högander <jouni.hogander@xxxxxxxxx> > > > Cc: Arun R Murthy <arun.r.murthy@xxxxxxxxx> > > > Cc: Jani Nikula <jani.nikula@xxxxxxxxx> > > > Signed-off-by: Animesh Manna <animesh.manna@xxxxxxxxx> > > > --- > > > drivers/gpu/drm/i915/display/intel_psr.c | 3 +++ > > > 1 file changed, 3 insertions(+) > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c > > > b/drivers/gpu/drm/i915/display/intel_psr.c > > > index f9837001aa5f..a2e0637c53fb 100644 > > > --- a/drivers/gpu/drm/i915/display/intel_psr.c > > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > > > @@ -2738,6 +2738,9 @@ void intel_psr_init(struct intel_dp *intel_dp) > > > if (!(HAS_PSR(dev_priv) || HAS_DP20(dev_priv))) > > > return; > > > > > > + if (!intel_dp_is_edp(intel_dp)) > > > + intel_psr_init_dpcd(intel_dp); > > > + > > > /* > > > * HSW spec explicitly says PSR is tied to port A. > > > * BDW+ platforms have a instance of PSR registers per transcoder > > > but > > > -- > > > 2.29.0
