On Tue, Oct 24, 2023 at 04:09:17AM +0300, Imre Deak wrote:
> Enable/disable the DSC decompression in the sink/branch from the MST
> encoder hooks. This prepares for an upcoming patch toggling DSC for each
> stream as needed, but for now keeps the current behavior, as DSC is only
> enabled for the first MST stream.
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@xxxxxxxxx>
>
> Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 12 ++++++++----
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 15 ++++++++++++++-
> 2 files changed, 22 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 99d96762fa29c..bc438272d6d1a 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -2538,7 +2538,9 @@ static void mtl_ddi_pre_enable_dp(struct intel_atomic_state *state,
> intel_dp_set_power(intel_dp, DP_SET_POWER_D0);
>
> intel_dp_configure_protocol_converter(intel_dp, crtc_state);
> - intel_dp_sink_set_decompression_state(intel_dp, crtc_state, true);
> + if (!is_mst)
> + intel_dp_sink_set_decompression_state(intel_dp, crtc_state, true);
> +
> /*
> * DDI FEC: "anticipates enabling FEC encoding sets the FEC_READY bit
> * in the FEC_CONFIGURATION register to 1 before initiating link
> @@ -2689,7 +2691,8 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
> intel_dp_set_power(intel_dp, DP_SET_POWER_D0);
>
> intel_dp_configure_protocol_converter(intel_dp, crtc_state);
> - intel_dp_sink_set_decompression_state(intel_dp, crtc_state, true);
> + if (!is_mst)
> + intel_dp_sink_set_decompression_state(intel_dp, crtc_state, true);
> /*
> * DDI FEC: "anticipates enabling FEC encoding sets the FEC_READY bit
> * in the FEC_CONFIGURATION register to 1 before initiating link
> @@ -2769,8 +2772,9 @@ static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state,
> if (!is_mst)
> intel_dp_set_power(intel_dp, DP_SET_POWER_D0);
> intel_dp_configure_protocol_converter(intel_dp, crtc_state);
> - intel_dp_sink_set_decompression_state(intel_dp, crtc_state,
> - true);
> + if (!is_mst)
> + intel_dp_sink_set_decompression_state(intel_dp, crtc_state,
> + true);
> intel_dp_sink_set_fec_ready(intel_dp, crtc_state, true);
> intel_dp_start_link_train(intel_dp, crtc_state);
> if ((port != PORT_A || DISPLAY_VER(dev_priv) >= 9) &&
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 9124e9cdf4c79..b0310f464c1cd 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -729,6 +729,13 @@ static void intel_mst_disable_dp(struct intel_atomic_state *state,
> drm_dp_remove_payload_part1(&intel_dp->mst_mgr, new_mst_state, new_payload);
>
> intel_audio_codec_disable(encoder, old_crtc_state, old_conn_state);
> +
> + if (intel_dp->active_mst_links == 1) /* last stream ? */
> + /*
> + * TODO: disable decompression for all streams/in any MST ports, not
> + * only in the first downstream branch device.
> + */
> + intel_dp_sink_set_decompression_state(intel_dp, old_crtc_state, false);
> }
>
> static void intel_mst_post_disable_dp(struct intel_atomic_state *state,
> @@ -883,9 +890,15 @@ static void intel_mst_pre_enable_dp(struct intel_atomic_state *state,
>
> drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port, true);
>
> - if (first_mst_stream)
> + if (first_mst_stream) {
> + /*
> + * TODO: enable decompression for all streams/in any MST ports, not
> + * only in the first downstream branch device.
> + */
> + intel_dp_sink_set_decompression_state(intel_dp, pipe_config, true);
> dig_port->base.pre_enable(state, &dig_port->base,
> pipe_config, NULL);
> + }
>
> intel_dp->active_mst_links++;
>
> --
> 2.39.2
>
