✓ Fi.CI.BAT: success for drm/i915/cx0: Only clear/set the Pipe Reset bit of the PHY Lanes Owned

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Title: Project List - Patchwork
Patch Details
Series:drm/i915/cx0: Only clear/set the Pipe Reset bit of the PHY Lanes Owned
URL:https://patchwork.freedesktop.org/series/124644/
State:success
Details:https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124644v1/index.html

CI Bug Log - changes from CI_DRM_13713 -> Patchwork_124644v1

Summary

SUCCESS

No regressions found.

External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124644v1/index.html

Participating hosts (40 -> 37)

Missing (3): bat-dg2-9 fi-snb-2520m fi-bsw-n3050

Known issues

Here are the changes found in Patchwork_124644v1 that come from known issues:

CI changes

Issues hit

IGT changes

Issues hit

Possible fixes

Warnings

{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).

Build changes

CI-20190529: 20190529
CI_DRM_13713: 4540606b1e3d945191858f82b07576e12feb7f26 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7512: 2eb58faf82d3cd5e2e74154a7319cff56eb40762 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_124644v1: 4540606b1e3d945191858f82b07576e12feb7f26 @ git://anongit.freedesktop.org/gfx-ci/linux

Linux commits

eda3ef1ba537 drm/i915/cx0: Only clear/set the Pipe Reset bit of the PHY Lanes Owned


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