On Tue, 03 Oct 2023, Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx> wrote: > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > Start to clean up the mess around DPLL IDs a bit by removing > the nasty assumption that the index of the DPLL in the > arrays matches its ID. Fortunately we did have a WARN > i nthere to cathc mistakes, but better to not has such > silly assumptions i nthe first place. > > There's still a lot of mess left since the DPLL IDs in > the hardware are a mess as well. Eg. the index of the > register instance often differs from the index used > to select the DPLL in clock routing thing. So we could > probably clean up more of that, perhaps by declaring > separate IDs for each PLL for each use case... Reviewed-by: Jani Nikula <jani.nikula@xxxxxxxxx> still holds on the series > > v2: > - the trivial patches were already merged > - introduce pll->index > - add another patch for for_each_shared_dpll() > - add another patch s/dev_priv/i915/ > > v3: > - deal with pll->index in debugfs code > - rebase due to other changes > > Ville Syrjälä (4): > drm/i915: Stop requiring PLL index == PLL ID > drm/i915: Decouple I915_NUM_PLLS from PLL IDs > drm/i915: Introduce for_each_shared_dpll() > drm/i915: s/dev_priv/i915/ in the shared_dpll code > > .../drm/i915/display/intel_display_debugfs.c | 9 +- > drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 965 +++++++++--------- > drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 26 +- > .../gpu/drm/i915/display/intel_pch_refclk.c | 7 +- > 4 files changed, 522 insertions(+), 485 deletions(-) -- Jani Nikula, Intel
