On Thu, Sep 14, 2023 at 10:26:53PM +0300, Imre Deak wrote:
> Atm the DSC PPS SDP is programmed only if the first stream is compressed
> and then it's programmed only for the first stream. This left all other
> compressed streams blank. Program the SDP for all streams.
>
> Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 12 +++++++-----
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 ++
> 2 files changed, 9 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 45db6349af94f..962c9c7c211ce 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -2505,7 +2505,8 @@ static void mtl_ddi_pre_enable_dp(struct intel_atomic_state *state,
> /* 6.o Configure and enable FEC if needed */
> intel_ddi_enable_fec(encoder, crtc_state);
>
> - intel_dsc_dp_pps_write(encoder, crtc_state);
> + if (!is_mst)
> + intel_dsc_dp_pps_write(encoder, crtc_state);
> }
>
> static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
> @@ -2643,7 +2644,8 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
> /* 7.l Configure and enable FEC if needed */
> intel_ddi_enable_fec(encoder, crtc_state);
>
> - intel_dsc_dp_pps_write(encoder, crtc_state);
> + if (!is_mst)
> + intel_dsc_dp_pps_write(encoder, crtc_state);
> }
>
> static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state,
> @@ -2705,10 +2707,10 @@ static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state,
>
> intel_ddi_enable_fec(encoder, crtc_state);
>
> - if (!is_mst)
> + if (!is_mst) {
> intel_ddi_enable_transcoder_clock(encoder, crtc_state);
> -
> - intel_dsc_dp_pps_write(encoder, crtc_state);
> + intel_dsc_dp_pps_write(encoder, crtc_state);
> + }
> }
>
> static void intel_ddi_pre_enable_dp(struct intel_atomic_state *state,
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 832e8b0e87e84..19548242fa0f2 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -43,6 +43,7 @@
> #include "intel_dpio_phy.h"
> #include "intel_hdcp.h"
> #include "intel_hotplug.h"
> +#include "intel_vdsc.h"
> #include "skl_scaler.h"
>
> static int intel_dp_mst_check_constraints(struct drm_i915_private *i915, int bpp,
> @@ -775,6 +776,7 @@ static void intel_mst_pre_enable_dp(struct intel_atomic_state *state,
> if (DISPLAY_VER(dev_priv) < 12 || !first_mst_stream)
> intel_ddi_enable_transcoder_clock(encoder, pipe_config);
>
> + intel_dsc_dp_pps_write(&dig_port->base, pipe_config);
> intel_ddi_set_dp_msa(pipe_config, conn_state);
> }
>
> --
> 2.37.2
>
