On Thu, Sep 14, 2023 at 10:26:39PM +0300, Imre Deak wrote:
> Limit the output link bpp in DSC mode to the link_config_limits
> link.min_bpp_x16 .. max_bpp_x16 range the same way it's done in non-DSC
> mode. Atm this doesn't make a difference, the link bpp range being
> 0 .. max pipe bpp, but a follow-up patch will need a way to reduce max
> link bpp below its current value.
>
> v2:
> - Add to_bpp_int_roundup() instead of open coding it. (Jani)
>
> Cc: Jani Nikula <jani.nikula@xxxxxxxxxxxxxxx>
> Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx>
Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_display_types.h | 5 +++++
> drivers/gpu/drm/i915/display/intel_dp.c | 4 ++++
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 3 +++
> 3 files changed, 12 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 50fe8ff354137..966163ccbd7a3 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -2123,6 +2123,11 @@ static inline int to_bpp_frac(int bpp_x16)
> #define BPP_X16_FMT "%d.%04d"
> #define BPP_X16_ARGS(bpp_x16) to_bpp_int(bpp_x16), (to_bpp_frac(bpp_x16) * 625)
>
> +static inline int to_bpp_int_roundup(int bpp_x16)
> +{
> + return (bpp_x16 + 0xf) >> 4;
> +}
> +
> static inline int to_bpp_x16(int bpp)
> {
> return bpp << 4;
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 2a45eefc83ebf..d5e6813d36c8f 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1925,6 +1925,7 @@ static int dsc_compute_compressed_bpp(struct intel_dp *intel_dp,
> dsc_src_min_bpp = dsc_src_min_compressed_bpp();
> dsc_sink_min_bpp = dsc_sink_min_compressed_bpp(pipe_config);
> dsc_min_bpp = max(dsc_src_min_bpp, dsc_sink_min_bpp);
> + dsc_min_bpp = max(dsc_min_bpp, to_bpp_int_roundup(limits->link.min_bpp_x16));
>
> dsc_src_max_bpp = dsc_src_max_compressed_bpp(intel_dp);
> dsc_sink_max_bpp = dsc_sink_max_compressed_bpp(intel_dp, pipe_config, pipe_bpp / 3);
> @@ -1934,6 +1935,7 @@ static int dsc_compute_compressed_bpp(struct intel_dp *intel_dp,
> adjusted_mode->hdisplay,
> pipe_config->bigjoiner_pipes);
> dsc_max_bpp = min(dsc_max_bpp, dsc_joiner_max_bpp);
> + dsc_max_bpp = min(dsc_max_bpp, to_bpp_int(limits->link.max_bpp_x16));
>
> if (DISPLAY_VER(i915) >= 13)
> return xelpd_dsc_compute_link_config(intel_dp, pipe_config, limits,
> @@ -2079,10 +2081,12 @@ static int intel_edp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp,
> dsc_src_min_bpp = dsc_src_min_compressed_bpp();
> dsc_sink_min_bpp = dsc_sink_min_compressed_bpp(pipe_config);
> dsc_min_bpp = max(dsc_src_min_bpp, dsc_sink_min_bpp);
> + dsc_min_bpp = max(dsc_min_bpp, to_bpp_int_roundup(limits->link.min_bpp_x16));
>
> dsc_src_max_bpp = dsc_src_max_compressed_bpp(intel_dp);
> dsc_sink_max_bpp = dsc_sink_max_compressed_bpp(intel_dp, pipe_config, pipe_bpp / 3);
> dsc_max_bpp = dsc_sink_max_bpp ? min(dsc_sink_max_bpp, dsc_src_max_bpp) : dsc_src_max_bpp;
> + dsc_max_bpp = min(dsc_max_bpp, to_bpp_int(limits->link.max_bpp_x16));
>
> /* Compressed BPP should be less than the Input DSC bpp */
> dsc_max_bpp = min(dsc_max_bpp, pipe_bpp - 1);
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 7d84689d69fad..d38d0dd23fc39 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -233,6 +233,9 @@ static int intel_dp_dsc_mst_compute_link_config(struct intel_encoder *encoder,
> if (max_bpp > sink_max_bpp)
> max_bpp = sink_max_bpp;
>
> + min_bpp = max(min_bpp, to_bpp_int_roundup(limits->link.min_bpp_x16));
> + max_bpp = min(max_bpp, to_bpp_int(limits->link.max_bpp_x16));
> +
> slots = intel_dp_mst_find_vcpi_slots_for_bpp(encoder, crtc_state, max_bpp,
> min_bpp, limits,
> conn_state, 2 * 3, true);
> --
> 2.37.2
--
Ville Syrjälä
Intel
