Cross posting this to the i915 and xe mailing lists. The basic platform
enabling for Lunar Lake is already applied in the xe driver[1].
This patch series adds the display support in the i915 driver, that is
going to be shared with xe.
Like v3, this is based off drm-tip and the goal is to start applying
patches to drm-intel-next.
v4 adds a couple more patches due to review feedback and moves the
cdclk stuff to the end of the series. We are running into some
issues due to those patches, so it's better to have the rest land
earlier. This should address all the comments from v3.
Balasubramani Vivekanandan (1):
drm/i915/lnl: Add display definitions
Clint Taylor (3):
drm/i915/display: Remove FBC capability from fused off pipes
drm/i915/xe2lpd: Register DE_RRMR has been removed
drm/i915/display: Consolidate saved port bits in intel_digital_port
Gustavo Sousa (3):
drm/i915/xe2lpd: Add fake PCH
drm/i915/xe2lpd: Handle port AUX interrupts
drm/i915/xe2lpd: Add support for HPD
Juha-Pekka Heikkilä (1):
drm/i915/xe2lpd: Enable odd size and panning for planar yuv
Luca Coelho (1):
drm/i915/xe2lpd: Read pin assignment from IOM
Lucas De Marchi (10):
drm/i915/xelpdp: Add XE_LPDP_FEATURES
drm/i915: Re-order if/else ladder in intel_detect_pch()
drm/i915/display: Rename intel_dp->DP
drm/i915/xe2lpd: Move D2D enable/disable
drm/i915/xe2lpd: Move registers to PICA
drm/i915/display: Fix style and conventions for DP AUX regs
drm/i915/display: Use _PICK_EVEN_2RANGES() in DP AUX regs
drm/i915/xe2lpd: Re-order DP AUX regs
drm/i915/xe2lpd: Extend Wa_15010685871
drm/i915/lnl: Add gmbus/ddc support
Matt Roper (3):
drm/i915/xe2lpd: FBC is now supported on all pipes
drm/i915/xe2lpd: Don't try to program PLANE_AUX_DIST
drm/i915/xe2lpd: Add DC state support
Ravi Kumar Vodapalli (2):
drm/i915/xe2lpd: Add display power well
drm/i915/lnl: Add programming for CDCLK change
Stanislav Lisovskiy (6):
drm/i915/xe2lpd: Treat cursor plane as regular plane for DDB
allocation
drm/i915/lnl: Add CDCLK table
drm/i915/lnl: Start using CDCLK through PLL
FIXME: drm/i915/lnl: Introduce MDCLK_CDCLK ratio to DBuf
drm/i915/xe2lpd: Write DBuf after CDCLK change in post plane
drm/i915/xe2lpd: Update mbus on post plane updates
drivers/gpu/drm/i915/display/g4x_dp.c | 118 ++++++++---------
.../gpu/drm/i915/display/intel_atomic_plane.c | 14 +-
drivers/gpu/drm/i915/display/intel_bios.c | 3 +-
drivers/gpu/drm/i915/display/intel_cdclk.c | 120 +++++++++++++++++-
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 85 +++++++------
.../gpu/drm/i915/display/intel_cx0_phy_regs.h | 63 +++++++--
drivers/gpu/drm/i915/display/intel_ddi.c | 98 ++++++++------
drivers/gpu/drm/i915/display/intel_display.c | 5 +-
.../drm/i915/display/intel_display_device.c | 67 ++++++++--
.../gpu/drm/i915/display/intel_display_irq.c | 4 +-
.../drm/i915/display/intel_display_power.c | 4 +-
.../i915/display/intel_display_power_map.c | 54 +++++++-
.../i915/display/intel_display_power_well.c | 47 ++++++-
.../i915/display/intel_display_power_well.h | 1 +
.../drm/i915/display/intel_display_types.h | 2 +-
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp_aux.c | 8 +-
.../gpu/drm/i915/display/intel_dp_aux_regs.h | 80 ++++++------
drivers/gpu/drm/i915/display/intel_fbc.h | 2 +
drivers/gpu/drm/i915/display/intel_gmbus.c | 5 +-
.../gpu/drm/i915/display/intel_hotplug_irq.c | 24 +++-
drivers/gpu/drm/i915/display/intel_tc.c | 44 ++++++-
.../drm/i915/display/skl_universal_plane.c | 2 +-
drivers/gpu/drm/i915/display/skl_watermark.c | 51 ++++++--
drivers/gpu/drm/i915/display/skl_watermark.h | 1 +
.../gpu/drm/i915/display/skl_watermark_regs.h | 2 +
drivers/gpu/drm/i915/i915_gpu_error.c | 2 +-
drivers/gpu/drm/i915/i915_reg.h | 9 +-
drivers/gpu/drm/i915/soc/intel_pch.c | 12 +-
drivers/gpu/drm/i915/soc/intel_pch.h | 2 +
30 files changed, 685 insertions(+), 246 deletions(-)
--
2.40.1
