== Series Details == Series: drm/i915: VRR, LRR, and M/N stuff (rev3) URL : https://patchwork.freedesktop.org/series/123171/ State : warning == Summary == Error: dim checkpatch failed f109dbfb222e drm/i915: Move psr unlock out from the pipe update critical section b0cd3befc8d8 drm/i915: Change intel_pipe_update_{start, end}() calling convention ac4a04c6ee67 drm/i915: Extract intel_crtc_vblank_evade_scanlines() d94b8ec8df75 drm/i915: Enable VRR later during fastsets 3736cd1a5634 drm/i915: Adjust seamless_m_n flag behaviour bfe2861ee4f5 drm/i915: Optimize out redundant M/N updates bcbc7331c4dd drm/i915: Relocate is_in_vrr_range() 2327b8d3bceb drm/i915: Validate that the timings are within the VRR range 67b63054531a drm/i915: Disable VRR during seamless M/N changes 65fc33454c03 drm/i915: Update VRR parameters in fastset 0706f6c0bc1d drm/i915: Assert that VRR is off during vblank evasion if necessary d85bf5ffbe6c drm/i915: Implement transcoder LRR for TGL+ -:175: WARNING:LONG_LINE: line length of 108 exceeds 100 columns #175: FILE: drivers/gpu/drm/i915/display/intel_display.c:5621: + (old_crtc_state->hw.adjusted_mode.crtc_vtotal == new_crtc_state->hw.adjusted_mode.crtc_vtotal && -:176: WARNING:LONG_LINE: line length of 115 exceeds 100 columns #176: FILE: drivers/gpu/drm/i915/display/intel_display.c:5622: + old_crtc_state->hw.adjusted_mode.crtc_vblank_end == new_crtc_state->hw.adjusted_mode.crtc_vblank_end)) total: 0 errors, 2 warnings, 0 checks, 201 lines checked
