Re: [PATCH v4 2/2] drm/i915/lnl: FBC is supported with per pixel alpha

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Hi Ville,

It was confirmed by Jani Nikula that it is 20. Here is his comments.

".... display ver 20 is what the hardware reports to us. the current info is at bspecb70821  if you scroll down to "LNL GMD Architecture IDs"
"

Br
Vinod



From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Sent: Wednesday, September 13, 2023 1:38:23 PM
To: Govindapillai, Vinod <vinod.govindapillai@xxxxxxxxx>
Cc: intel-xe@xxxxxxxxxxxxxxxxxxxxx <intel-xe@xxxxxxxxxxxxxxxxxxxxx>; Roper, Matthew D <matthew.d.roper@xxxxxxxxx>; intel-gfx@xxxxxxxxxxxxxxxxxxxxx <intel-gfx@xxxxxxxxxxxxxxxxxxxxx>; Syrjala, Ville <ville.syrjala@xxxxxxxxx>
Subject: Re: [PATCH v4 2/2] drm/i915/lnl: FBC is supported with per pixel alpha
 
On Mon, Sep 04, 2023 at 02:55:17PM +0300, Vinod Govindapillai wrote:
> For LNL onwards, FBC can be supported on planes with per
> pixel alpha
>
> Bspec: 69560
> Signed-off-by: Vinod Govindapillai <vinod.govindapillai@xxxxxxxxx>
> ---
>  drivers/gpu/drm/i915/display/intel_fbc.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index a3999ad95a19..c0e4caec03ea 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -1209,7 +1209,8 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
>                return 0;
>        }

> -     if (plane_state->hw.pixel_blend_mode != DRM_MODE_BLEND_PIXEL_NONE &&
> +     if (DISPLAY_VER(i915) < 20 &&

Bspec still says 15. Someone needs to figure this mess out for
all LNL patches.

> +         plane_state->hw.pixel_blend_mode != DRM_MODE_BLEND_PIXEL_NONE &&
>            fb->format->has_alpha) {

We would have already rejected the pixel format earlier, so atm this
check is redundant.

>                plane_state->no_fbc_reason = "per-pixel alpha not supported";
>                return 0;
> --
> 2.34.1

--
Ville Syrjälä
Intel

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