== Series Details == Series: Add DSC fractional bpp support (rev6) URL : https://patchwork.freedesktop.org/series/111391/ State : warning == Summary == Error: dim checkpatch failed 7058c3132171 drm/display/dp: Add helper function to get DSC bpp prescision eef79ef63c3a drm/i915/display: Store compressed bpp in U6.4 format Traceback (most recent call last): File "scripts/spdxcheck.py", line 6, in <module> from ply import lex, yacc ModuleNotFoundError: No module named 'ply' -:118: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #118: FILE: drivers/gpu/drm/i915/display/intel_bios.c:3390: + intel_fractional_bpp_to_x16(min(crtc_state->pipe_bpp, + VBT_DSC_MAX_BPP(dsc->max_bpp))); -:140: WARNING:LONG_LINE: line length of 103 exceeds 100 columns #140: FILE: drivers/gpu/drm/i915/display/intel_cdclk.c:2571: + int min_cdclk_bj = (intel_fractional_bpp_from_x16(crtc_state->dsc.compressed_bpp_x16) * -:189: WARNING:LONG_LINE: line length of 108 exceeds 100 columns #189: FILE: drivers/gpu/drm/i915/display/intel_dp.c:1867: + pipe_config->dsc.compressed_bpp_x16 = intel_fractional_bpp_to_x16(valid_dsc_bpp[i]); -:198: WARNING:LONG_LINE: line length of 106 exceeds 100 columns #198: FILE: drivers/gpu/drm/i915/display/intel_dp.c:1905: + pipe_config->dsc.compressed_bpp_x16 = intel_fractional_bpp_to_x16(compressed_bpp); -:207: WARNING:LONG_LINE: line length of 105 exceeds 100 columns #207: FILE: drivers/gpu/drm/i915/display/intel_dp.c:2089: + pipe_config->dsc.compressed_bpp_x16 = intel_fractional_bpp_to_x16(max(dsc_min_bpp, dsc_max_bpp)); -:253: WARNING:LONG_LINE: line length of 108 exceeds 100 columns #253: FILE: drivers/gpu/drm/i915/display/intel_dp.c:2275: + intel_fractional_bpp_from_x16(pipe_config->dsc.compressed_bpp_x16)), -:299: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #299: FILE: drivers/gpu/drm/i915/display/intel_dp_mst.c:246: + intel_fractional_bpp_to_x16(intel_dp_dsc_nearest_valid_bpp(i915, + last_compressed_bpp, -:314: WARNING:LONG_LINE: line length of 106 exceeds 100 columns #314: FILE: drivers/gpu/drm/i915/display/intel_dp_mst.c:258: + intel_fractional_bpp_from_x16(crtc_state->dsc.compressed_bpp_x16), -:315: WARNING:LONG_LINE: line length of 106 exceeds 100 columns #315: FILE: drivers/gpu/drm/i915/display/intel_dp_mst.c:259: + intel_fractional_bpp_from_x16(crtc_state->dsc.compressed_bpp_x16), -:327: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #327: new file mode 100644 total: 0 errors, 8 warnings, 2 checks, 302 lines checked 0f248379263d drm/i915/display: Consider fractional vdsc bpp while computing m_n values 1aaabe03687f drm/i915/audio : Consider fractional vdsc bpp while computing tu_data adcdfae5fce4 drm/i915/dsc/mtl: Add support for fractional bpp d5dfd1cce381 drm/i915/dp: Iterate over output bpp with fractional step size 098bb9e549cb drm/i915/dsc: Add debugfs entry to validate DSC fractional bpp 1c1295360f87 drm/i915/dsc: Allow DSC only with fractional bpp when forced from debugfs
