On Tue, Sep 12, 2023 at 09:35:21AM +0200, Andrzej Hajda wrote: > Some DG2 firmware locks this register for modification. Using wa_add > with read_mask 0 allows to skip checks of such registers. > > Signed-off-by: Andrzej Hajda <andrzej.hajda@xxxxxxxxx> > --- > drivers/gpu/drm/i915/gt/intel_workarounds.c | 7 +++++-- > 1 file changed, 5 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c > index 70071ead0659cc..1d1474ad945e0c 100644 > --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c > +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c > @@ -1597,8 +1597,11 @@ dg2_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal) > /* Wa_14014830051:dg2 */ > wa_mcr_write_clr(wal, SARB_CHICKEN1, COMP_CKN_IN); > > - /* Wa_14015795083 */ > - wa_write_clr(wal, GEN7_MISCCPCTL, GEN12_DOP_CLOCK_GATE_RENDER_ENABLE); > + /* Wa_14015795083 Minor nitpick: kernel coding style says that "/*" should be on a line by itself for multi-line comments. Aside from that, Reviewed-by: Matt Roper <matthew.d.roper@xxxxxxxxx> Matt > + * Skip verification for possibly locked register. > + */ > + wa_add(wal, GEN7_MISCCPCTL, GEN12_DOP_CLOCK_GATE_RENDER_ENABLE, > + 0, 0, false); > > /* Wa_18018781329 */ > wa_mcr_write_or(wal, RENDER_MOD_CTRL, FORCE_MISS_FTLB); > -- > 2.34.1 > -- Matt Roper Graphics Software Engineer Linux GPU Platform Enablement Intel Corporation
