> -----Original Message-----
> From: Jani Nikula <jani.nikula@xxxxxxxxxxxxxxx>
> Sent: Tuesday, September 12, 2023 1:08 PM
> To: Shankar, Uma <uma.shankar@xxxxxxxxx>; Ville Syrjala
> <ville.syrjala@xxxxxxxxxxxxxxx>; intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> Subject: RE: [PATCH v2 02/19] drm/i915/dsb: Use non-locked register
> access
>
> On Mon, 11 Sep 2023, "Shankar, Uma" <uma.shankar@xxxxxxxxx> wrote:
> >> -----Original Message-----
> >> From: Intel-gfx <intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf
> >> Of Jani Nikula
> >> Sent: Thursday, June 8, 2023 5:16 PM
> >> To: Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx>;
> >> intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> >> Subject: Re: [PATCH v2 02/19] drm/i915/dsb: Use
> >> non-locked register access
> >>
> >> On Tue, 06 Jun 2023, Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx> wrote:
> >> > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> >> >
> >> > Avoid the locking overhead for DSB registers. We don't need the
> >> > locks and intel_dsb_commit() in particular needs to be called from
> >> > the vblank evade critical section and thus needs to be fast.
> >>
> >> Mmmh, I always find it slightly puzzling to encounter _fw calls in
> >> code, wondering what the rationale was, and why we can use the _fw
> variants.
> >>
> >> Should we start adding comments explaining why?
> >
> > I believe it’s a light weight write without any locks and forcewake.
>
> That part is clear; the why isn't. :)
Yes I agree, to add the reasoning will be good 😊. Some justification is added though:
"intel_dsb_commit() in particular needs to be called from the vblank evade
critical section and thus needs to be fast".
> > Maybe a comment to explain the rationale would be good.
> >
> > With that added, this is:
> > Reviewed-by: Uma Shankar <uma.shankar@xxxxxxxxx>
> >
> >> BR,
> >> Jani.
> >>
> >>
> >> >
> >> > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> >> > ---
> >> > drivers/gpu/drm/i915/display/intel_dsb.c | 18 +++++++++---------
> >> > 1 file changed, 9 insertions(+), 9 deletions(-)
> >> >
> >> > diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c
> >> > b/drivers/gpu/drm/i915/display/intel_dsb.c
> >> > index bed058d2c3ac..97e593d9f100 100644
> >> > --- a/drivers/gpu/drm/i915/display/intel_dsb.c
> >> > +++ b/drivers/gpu/drm/i915/display/intel_dsb.c
> >> > @@ -96,7 +96,7 @@ static bool assert_dsb_has_room(struct intel_dsb
> >> > *dsb) static bool is_dsb_busy(struct drm_i915_private *i915, enum pipe
> pipe,
> >> > enum dsb_id id)
> >> > {
> >> > - return intel_de_read(i915, DSB_CTRL(pipe, id)) & DSB_STATUS_BUSY;
> >> > + return intel_de_read_fw(i915, DSB_CTRL(pipe, id)) &
> >> > +DSB_STATUS_BUSY;
> >> > }
> >> >
> >> > static void intel_dsb_emit(struct intel_dsb *dsb, u32 ldw, u32
> >> > udw) @@ -243,13 +243,13 @@ void intel_dsb_commit(struct intel_dsb
> >> > *dsb, bool
> >> wait_for_vblank)
> >> > return;
> >> > }
> >> >
> >> > - intel_de_write(dev_priv, DSB_CTRL(pipe, dsb->id),
> >> > - (wait_for_vblank ? DSB_WAIT_FOR_VBLANK : 0) |
> >> > - DSB_ENABLE);
> >> > - intel_de_write(dev_priv, DSB_HEAD(pipe, dsb->id),
> >> > - i915_ggtt_offset(dsb->vma));
> >> > - intel_de_write(dev_priv, DSB_TAIL(pipe, dsb->id),
> >> > - i915_ggtt_offset(dsb->vma) + tail);
> >> > + intel_de_write_fw(dev_priv, DSB_CTRL(pipe, dsb->id),
> >> > + (wait_for_vblank ? DSB_WAIT_FOR_VBLANK : 0) |
> >> > + DSB_ENABLE);
> >> > + intel_de_write_fw(dev_priv, DSB_HEAD(pipe, dsb->id),
> >> > + i915_ggtt_offset(dsb->vma));
> >> > + intel_de_write_fw(dev_priv, DSB_TAIL(pipe, dsb->id),
> >> > + i915_ggtt_offset(dsb->vma) + tail);
> >> > }
> >> >
> >> > void intel_dsb_wait(struct intel_dsb *dsb) @@ -266,7 +266,7 @@
> >> > void intel_dsb_wait(struct intel_dsb *dsb)
> >> > /* Attempt to reset it */
> >> > dsb->free_pos = 0;
> >> > dsb->ins_start_offset = 0;
> >> > - intel_de_write(dev_priv, DSB_CTRL(pipe, dsb->id), 0);
> >> > + intel_de_write_fw(dev_priv, DSB_CTRL(pipe, dsb->id), 0);
> >> > }
> >> >
> >> > /**
> >>
> >> --
> >> Jani Nikula, Intel Open Source Graphics Center
>
> --
> Jani Nikula, Intel
