> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Manna,
> Animesh
> Sent: Tuesday, July 11, 2023 11:13 AM
> To: Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx>; intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> Subject: Re: [PATCH v2 10/19] drm/i915/dsb: Add support for non-
> posted DSB registers writes
>
>
>
> > -----Original Message-----
> > From: Intel-gfx <intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of
> > Ville Syrjala
> > Sent: Wednesday, June 7, 2023 12:45 AM
> > To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> > Subject: [PATCH v2 10/19] drm/i915/dsb: Add support for
> > non- posted DSB registers writes
> >
> > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> >
> > Writing specific transcoder registers (and as it turns out, the legacy
> > LUT as
> > well) via DSB needs a magic sequence to emit non-posted register writes.
> > Add a helper for this.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> Tried to check in bspec where non-posted write for DSB is required and its
> advantage but could not locate. Not sure if it is captured in bspec. Would it be
> possible to add some reference in commit description.
It's in "special programming" section in DSB Engine programming page in bspec.
Overall change looks good to me.
Reviewed-by: Uma Shankar <uma.shankar@xxxxxxxxx>
> Regards,
> Animesh
>
> > ---
> > drivers/gpu/drm/i915/display/intel_dsb.c | 20 ++++++++++++++++++++
> > drivers/gpu/drm/i915/display/intel_dsb.h | 3 +++
> > 2 files changed, 23 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c
> > b/drivers/gpu/drm/i915/display/intel_dsb.c
> > index 6be353fdc7fc..73d609507f24 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dsb.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dsb.c
> > @@ -261,6 +261,26 @@ void intel_dsb_noop(struct intel_dsb *dsb, int
> > count)
> > DSB_OPCODE_NOOP << DSB_OPCODE_SHIFT); }
> >
> > +void intel_dsb_nonpost_start(struct intel_dsb *dsb) {
> > + struct intel_crtc *crtc = dsb->crtc;
> > + enum pipe pipe = crtc->pipe;
> > +
> > + intel_dsb_reg_write_masked(dsb, DSB_CTRL(pipe, dsb->id),
> > + DSB_NON_POSTED, DSB_NON_POSTED);
> > + intel_dsb_noop(dsb, 4);
> > +}
> > +
> > +void intel_dsb_nonpost_end(struct intel_dsb *dsb) {
> > + struct intel_crtc *crtc = dsb->crtc;
> > + enum pipe pipe = crtc->pipe;
> > +
> > + intel_dsb_reg_write_masked(dsb, DSB_CTRL(pipe, dsb->id),
> > + DSB_NON_POSTED, 0);
> > + intel_dsb_noop(dsb, 4);
> > +}
> > +
> > static void intel_dsb_align_tail(struct intel_dsb *dsb) {
> > u32 aligned_tail, tail;
> > diff --git a/drivers/gpu/drm/i915/display/intel_dsb.h
> > b/drivers/gpu/drm/i915/display/intel_dsb.h
> > index 983b0d58ad44..54e9e1dc31ee 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dsb.h
> > +++ b/drivers/gpu/drm/i915/display/intel_dsb.h
> > @@ -22,6 +22,9 @@ void intel_dsb_reg_write(struct intel_dsb *dsb,
> > void intel_dsb_reg_write_masked(struct intel_dsb *dsb,
> > i915_reg_t reg, u32 mask, u32 val); void
> intel_dsb_noop(struct
> > intel_dsb *dsb, int count);
> > +void intel_dsb_nonpost_start(struct intel_dsb *dsb); void
> > +intel_dsb_nonpost_end(struct intel_dsb *dsb);
> > +
> > void intel_dsb_commit(struct intel_dsb *dsb,
> > bool wait_for_vblank);
> > void intel_dsb_wait(struct intel_dsb *dsb);
> > --
> > 2.39.3
