Reviewed-by: Manasi Navare <navaremanasi@xxxxxxxxxxxx>
Manasi
On Fri, Sep 1, 2023 at 6:05 AM Ville Syrjala
<ville.syrjala@xxxxxxxxxxxxxxx> wrote:
>
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> Whenever we change the actual transcoder timings (clock via
> seamless M/N, full modeset, (or soon) vtotal via LRR) we
> want the timing generator to be in non-VRR during the commit.
> Warn if we forgot to turn VRR off prior to vblank evasion.
>
> Cc: Manasi Navare <navaremanasi@xxxxxxxxxxxx>
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_crtc.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
> index a04076064f02..a39e31c1ca85 100644
> --- a/drivers/gpu/drm/i915/display/intel_crtc.c
> +++ b/drivers/gpu/drm/i915/display/intel_crtc.c
> @@ -493,6 +493,10 @@ static void intel_crtc_vblank_evade_scanlines(struct intel_atomic_state *state,
> adjusted_mode = &crtc_state->hw.adjusted_mode;
>
> if (crtc->mode_flags & I915_MODE_FLAG_VRR) {
> + /* timing changes should happen with VRR disabled */
> + drm_WARN_ON(state->base.dev, intel_crtc_needs_modeset(new_crtc_state) ||
> + new_crtc_state->update_m_n);
> +
> if (intel_vrr_is_push_sent(crtc_state))
> *vblank_start = intel_vrr_vmin_vblank_start(crtc_state);
> else
> --
> 2.41.0
>
