Xe2_LPD also needs workaround 15010685871. While adding the new display
version, also re-order the condition to follow the convention of new
version first.
Signed-off-by: Lucas De Marchi <lucas.demarchi@xxxxxxxxx>
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index ad5251ba6fe1..cfd01050f7f1 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1841,9 +1841,10 @@ static bool cdclk_compute_crawl_and_squash_midpoint(struct drm_i915_private *i91
static bool pll_enable_wa_needed(struct drm_i915_private *dev_priv)
{
- return ((IS_DG2(dev_priv) || DISPLAY_VER_FULL(dev_priv) == IP_VER(14, 0)) &&
- dev_priv->display.cdclk.hw.vco > 0 &&
- HAS_CDCLK_SQUASH(dev_priv));
+ return (DISPLAY_VER_FULL(dev_priv) == IP_VER(20, 0) ||
+ DISPLAY_VER_FULL(dev_priv) == IP_VER(14, 0) ||
+ IS_DG2(dev_priv)) && dev_priv->display.cdclk.hw.vco > 0 &&
+ HAS_CDCLK_SQUASH(dev_priv);
}
static void _bxt_set_cdclk(struct drm_i915_private *dev_priv,
--
2.40.1
