MTL can hang because of a HW bug while parallel reading/writing from/to LMEM/GTTMMADR BAR so try to reduce GGTT update related pci transactions with blitter command as recommended for Wa_13010847436 and Wa_14019519902. To issue gpu commands, the driver must be primed to receive requests. Maintain binder-based GGTT update disablement until driver probing completes. Moreover, implement a temporary disablement of blitter prior to entering suspend, followed by re-enablement post-resume. This is acceptable as those transition periods are mostly single threaded. v2: Disable GGTT blitter prior to runtime suspend and re-enable after runtime resume. v3: Remove above as we check if the GT is awake. Signed-off-by: Nirmoy Das <nirmoy.das@xxxxxxxxx> Signed-off-by: Oak Zeng <oak.zeng@xxxxxxxxx> --- drivers/gpu/drm/i915/gt/intel_gtt.c | 3 ++- drivers/gpu/drm/i915/i915_driver.c | 5 +++++ 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c b/drivers/gpu/drm/i915/gt/intel_gtt.c index 4c89eb8d9af7..4fbed27ef0ec 100644 --- a/drivers/gpu/drm/i915/gt/intel_gtt.c +++ b/drivers/gpu/drm/i915/gt/intel_gtt.c @@ -23,7 +23,8 @@ bool i915_ggtt_require_binder(struct drm_i915_private *i915) { - return false; + /* Wa_13010847436 & Wa_14019519902 */ + return MEDIA_VER_FULL(i915) == IP_VER(13, 0); } static bool intel_ggtt_update_needs_vtd_wa(struct drm_i915_private *i915) diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c index f8dbee7a5af7..8cc289acdb39 100644 --- a/drivers/gpu/drm/i915/i915_driver.c +++ b/drivers/gpu/drm/i915/i915_driver.c @@ -815,6 +815,7 @@ int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent) i915_welcome_messages(i915); i915->do_release = true; + intel_gt_bind_context_set_ready(to_gt(i915), true); return 0; @@ -855,6 +856,7 @@ void i915_driver_remove(struct drm_i915_private *i915) { intel_wakeref_t wakeref; + intel_gt_bind_context_set_ready(to_gt(i915), false); wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915_driver_unregister(i915); @@ -1077,6 +1079,8 @@ static int i915_drm_suspend(struct drm_device *dev) struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev); pci_power_t opregion_target_state; + intel_gt_bind_context_set_ready(to_gt(dev_priv), false); + disable_rpm_wakeref_asserts(&dev_priv->runtime_pm); /* We do a lot of poking in a lot of registers, make sure they work @@ -1264,6 +1268,7 @@ static int i915_drm_resume(struct drm_device *dev) intel_gvt_resume(dev_priv); enable_rpm_wakeref_asserts(&dev_priv->runtime_pm); + intel_gt_bind_context_set_ready(to_gt(dev_priv), true); return 0; } -- 2.41.0