== Series Details == Series: drm/i915: VRR, LRR, and M/N stuff (rev2) URL : https://patchwork.freedesktop.org/series/123171/ State : warning == Summary == Error: dim checkpatch failed c7fffe8e772b drm/i915: Move psr unlock out from the pipe update critical section 0431a7e05f0c drm/i915: Change intel_pipe_update_{start, end}() calling convention 92d923a61bcb drm/i915: Extract intel_crtc_vblank_evade_scanlines() 00208c178f7e drm/i915: Enable VRR later during fastsets ba53ce94d6e6 drm/i915: Adjust seamless_m_n flag behaviour b9e3a8d75a8b drm/i915: Optimize out redundant M/N updates bb0955c10359 drm/i915: Relocate is_in_vrr_range() 73bdf859c6b4 drm/i915: Validate that the timings are within the VRR range eb64fd4e8af4 drm/i915: Disable VRR during seamless M/N changes 75ddcb0cebab drm/i915: Update VRR parameters in fastset 40f26b86aaf1 drm/i915: Assert that VRR is off during vblank evasion if necessary a39a2eb2de5e drm/i915: Implement transcoder LRR for TGL+ -:173: WARNING:LONG_LINE: line length of 108 exceeds 100 columns #173: FILE: drivers/gpu/drm/i915/display/intel_display.c:5589: + (old_crtc_state->hw.adjusted_mode.crtc_vtotal == new_crtc_state->hw.adjusted_mode.crtc_vtotal && -:174: WARNING:LONG_LINE: line length of 115 exceeds 100 columns #174: FILE: drivers/gpu/drm/i915/display/intel_display.c:5590: + old_crtc_state->hw.adjusted_mode.crtc_vblank_end == new_crtc_state->hw.adjusted_mode.crtc_vblank_end)) total: 0 errors, 2 warnings, 0 checks, 208 lines checked
