Currently i915 dirtyfb ioctl is not taking dma fences into account. This works with features like FBC, PSR, DRRS because our gem code is triggering flush again when rendering completes. We are targeting in getting rid of frontbuffer tracking code: Flusing hook from gem code will be removed as well. This patch set is adding dma fence handling into i915 dirtyfb ioctl. v3: - Check frontbuffer bits before adding any fence fb - Flush only when adding fence cb succeeds - Check schedule work success rather than work being pending - Init flush work when frontbuffer struct is initialized v2: - Clear fbc and psr busy bits on flip - Check if flush work is already pending - Use dma_resv_get_singleton Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Cc: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx> Jouni Högander (4): drm/i915/fbc: Clear frontbuffer busy bits on flip drm/i915/psr: Clear frontbuffer busy bits on flip drm/i915: Add new frontbuffer tracking interface to queue flush drm/i915: Handle dma fences in dirtyfb callback drivers/gpu/drm/i915/display/intel_fb.c | 60 ++++++++++++++++++- drivers/gpu/drm/i915/display/intel_fbc.c | 6 +- .../gpu/drm/i915/display/intel_frontbuffer.c | 28 +++++++++ .../gpu/drm/i915/display/intel_frontbuffer.h | 4 ++ drivers/gpu/drm/i915/display/intel_psr.c | 6 ++ 5 files changed, 97 insertions(+), 7 deletions(-) -- 2.34.1
