On Tue, Sep 17, 2013 at 06:15:31PM +0300, Jani Nikula wrote: > On Tue, 17 Sep 2013, Paulo Zanoni <przanoni@xxxxxxxxx> wrote: > > From: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> > > > > So far we control everything and nothing exceeds the current limits, > > but (i) we never think about these limits when reviewing patches, (ii) > > not all the callers check the return values and (iii) if we ever hit > > any of these messages, we'll have to fix the code that added the bad > > message. > > > > The current limit for these messages is 20 since we only have 5 data > > registers on all the current gens. > > > > The checks inside intel_dp_aux_native_{write,read} are to prevent > > buffer overflows. The check inside intel_dp_aux_ch is to prevent > > writing past our 5 data registers. > > I wish there were fewer magic values, but it does what it says on the > box. > > Reviewed-by: Jani Nikula <jani.nikula@xxxxxxxxx> Is that for both patches? I've merged the first one for now to dinq ... Thanks, Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx