On Tue, Aug 08, 2023 at 06:53:31PM +0300, Jani Nikula wrote:
> Unify on making the calls from display code. Need to add an if ladder in
> gen8_de_irq_postinstall() for now, but the function looks like it could
> be overall be better split by platform. Something for the future.
>
> The display version check for mtp seems a bit suspect, but this matches
> current code.
>
> Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx>
> ---
> .../gpu/drm/i915/display/intel_display_irq.c | 19 ++++++++++++-------
> .../gpu/drm/i915/display/intel_display_irq.h | 2 --
> drivers/gpu/drm/i915/i915_irq.c | 8 --------
> 3 files changed, 12 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
> index a697e0b32c34..62ce55475554 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> @@ -1537,7 +1537,7 @@ void gen8_irq_power_well_pre_disable(struct drm_i915_private *dev_priv,
> * to avoid races with the irq handler, assuming we have MSI. Shared legacy
> * interrupts could still race.
> */
> -void ibx_irq_postinstall(struct drm_i915_private *dev_priv)
> +static void ibx_irq_postinstall(struct drm_i915_private *dev_priv)
> {
> struct intel_uncore *uncore = &dev_priv->uncore;
> u32 mask;
> @@ -1624,6 +1624,9 @@ void ilk_de_irq_postinstall(struct drm_i915_private *i915)
> display_mask | extra_mask);
> }
>
> +static void mtp_irq_postinstall(struct drm_i915_private *i915);
> +static void icp_irq_postinstall(struct drm_i915_private *i915);
thanks for doing that... made review easier, although this patch almost got me
confused.
maybe worth a follow up to change the functions placement and void this
extra declaration and also ensure they are all together?
anyway,
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
> +
> void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
> {
> struct intel_uncore *uncore = &dev_priv->uncore;
> @@ -1641,6 +1644,13 @@ void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
> if (!HAS_DISPLAY(dev_priv))
> return;
>
> + if (DISPLAY_VER(dev_priv) >= 14)
> + mtp_irq_postinstall(dev_priv);
> + else if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP)
> + icp_irq_postinstall(dev_priv);
> + else if (HAS_PCH_SPLIT(dev_priv))
> + ibx_irq_postinstall(dev_priv);
> +
> if (DISPLAY_VER(dev_priv) <= 10)
> de_misc_masked |= GEN8_DE_MISC_GSE;
>
> @@ -1721,7 +1731,7 @@ static void mtp_irq_postinstall(struct drm_i915_private *i915)
> GEN3_IRQ_INIT(uncore, SDE, ~sde_mask, 0xffffffff);
> }
>
> -void icp_irq_postinstall(struct drm_i915_private *dev_priv)
> +static void icp_irq_postinstall(struct drm_i915_private *dev_priv)
> {
> struct intel_uncore *uncore = &dev_priv->uncore;
> u32 mask = SDE_GMBUS_ICP;
> @@ -1745,11 +1755,6 @@ void dg1_de_irq_postinstall(struct drm_i915_private *i915)
> if (!HAS_DISPLAY(i915))
> return;
>
> - if (DISPLAY_VER(i915) >= 14)
> - mtp_irq_postinstall(i915);
> - else
> - icp_irq_postinstall(i915);
> -
> gen8_de_irq_postinstall(i915);
> intel_uncore_write(&i915->uncore, GEN11_DISPLAY_INT_CTL,
> GEN11_DISPLAY_IRQ_ENABLE);
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.h b/drivers/gpu/drm/i915/display/intel_display_irq.h
> index 2ccc3e53cec3..2a090dd6abd7 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.h
> @@ -58,9 +58,7 @@ void vlv_display_irq_reset(struct drm_i915_private *i915);
> void gen8_display_irq_reset(struct drm_i915_private *i915);
> void gen11_display_irq_reset(struct drm_i915_private *i915);
>
> -void ibx_irq_postinstall(struct drm_i915_private *i915);
> void vlv_display_irq_postinstall(struct drm_i915_private *i915);
> -void icp_irq_postinstall(struct drm_i915_private *i915);
> void ilk_de_irq_postinstall(struct drm_i915_private *i915);
> void gen8_de_irq_postinstall(struct drm_i915_private *i915);
> void gen11_de_irq_postinstall(struct drm_i915_private *i915);
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index d63f79259637..1bfcfbe6e30b 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -792,11 +792,6 @@ static void valleyview_irq_postinstall(struct drm_i915_private *dev_priv)
>
> static void gen8_irq_postinstall(struct drm_i915_private *dev_priv)
> {
> - if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP)
> - icp_irq_postinstall(dev_priv);
> - else if (HAS_PCH_SPLIT(dev_priv))
> - ibx_irq_postinstall(dev_priv);
> -
> gen8_gt_irq_postinstall(to_gt(dev_priv));
> gen8_de_irq_postinstall(dev_priv);
>
> @@ -809,9 +804,6 @@ static void gen11_irq_postinstall(struct drm_i915_private *dev_priv)
> struct intel_uncore *uncore = gt->uncore;
> u32 gu_misc_masked = GEN11_GU_MISC_GSE;
>
> - if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP)
> - icp_irq_postinstall(dev_priv);
> -
> gen11_gt_irq_postinstall(gt);
> gen11_de_irq_postinstall(dev_priv);
>
> --
> 2.39.2
>
