On Tue, Jul 25, 2023 at 12:10:18PM +0200, Andi Shyti wrote:
> Hi Matt,
>
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> > @@ -470,9 +470,13 @@ enum i915_map_type i915_coherent_map_type(struct drm_i915_private *i915,
> > bool always_coherent)
> > {
> > /*
> > - * Wa_22016122933: always return I915_MAP_WC for MTL
> > + * Wa_22016122933: always return I915_MAP_WC for Xe_LPM+
> > + *
> > + * FIXME: The scope of this workaround is too wide right now and
> > + * is applying to objects used solely on the primary GT. We need to
> > + * take into account which GT will be operating on the shared object.
> > */
> > - if (i915_gem_object_is_lmem(obj) || IS_METEORLAKE(i915))
> > + if (i915_gem_object_is_lmem(obj) || MEDIA_VER_FULL(i915) == IP_VER(13, 0))
> > return I915_MAP_WC;
> > if (HAS_LLC(i915) || always_coherent)
> > return I915_MAP_WB;
> > diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> > index 21af0ec52223..24060278e7a2 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> > @@ -21,7 +21,7 @@ static void intel_gsc_idle_msg_enable(struct intel_engine_cs *engine)
> > {
> > struct drm_i915_private *i915 = engine->i915;
> >
> > - if (IS_METEORLAKE(i915) && engine->id == GSC0) {
> > + if (MEDIA_VER(i915) >= 13 && engine->id == GSC0) {
>
> this is a bit in countertrend... why isn't this
>
> MEDIA_VER_FULL(engine->i915) == IP_VER(13, 0)
>
> Like all others?
Generally we always assume that future platforms will inherit the
behavior of the current platform. The exceptions are things like
workarounds (for which every platform or IP has its own unique list and
we should never inherit) or things like TLB invalidation (where an
overlooked hardware change can go unnoticed in general system usage but
have serious consequences).
Matt
>
> Andi
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
