== Series Details == Series: Add DSC PPS readout (rev3) URL : https://patchwork.freedesktop.org/series/120456/ State : warning == Summary == Error: dim checkpatch failed 35e5b6fe7614 drm/i915/vdsc: Refactor dsc register field macro e09ea59f2e49 drm/i915/vdsc: Add a check for dsc split cases d8a331ec760b drm/i915/vdsc: Add function to read any PPS register a0e2e1595c46 drm/i915/vdsc: Use MACRO to cleanup intel_dsc_get_pps_reg -:19: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pipe' - possible side-effects? #19: FILE: drivers/gpu/drm/i915/display/intel_vdsc.c:373: +#define PRE_MTL_GET_DSC_REGISTER(pps, is_pipe_dsc, pipe) do { \ + if (is_pipe_dsc) { \ + *dsc_reg0 = ICL_DSC0_PICTURE_PARAMETER_SET_##pps(pipe); \ + *dsc_reg1 = ICL_DSC1_PICTURE_PARAMETER_SET_##pps(pipe); \ + } else { \ + *dsc_reg0 = DSCA_PICTURE_PARAMETER_SET_##pps; \ + *dsc_reg1 = DSCC_PICTURE_PARAMETER_SET_##pps; \ + } \ +} while (0) -:29: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pipe' - possible side-effects? #29: FILE: drivers/gpu/drm/i915/display/intel_vdsc.c:383: +#define MTL_GET_DSC_REGISTER(pps, pipe) do { \ + *dsc_reg0 = MTL_DSC0_PICTURE_PARAMETER_SET_##pps(pipe); \ + *dsc_reg1 = MTL_DSC1_PICTURE_PARAMETER_SET_##pps(pipe); \ +} while (0) total: 0 errors, 0 warnings, 2 checks, 163 lines checked 05fc5c372fe4 drm/i915/vdsc: Add function to write in PPS register 6e552a852efe drm/i915/vdsc: Fill the intel_dsc_get_pps_config function d3b81dba16cb drm/i915/display: Compare the readout dsc pps params
