✓ Fi.CI.BAT: success for drm/i915/gt: Remove incorrect hard coded cache coherrency setting (rev2)

[Patchwork <patchwork@xxxxxxxxxxxxxxxxxxxxxx>]

Title: Project List - Patchwork

Patch Details

Series:	drm/i915/gt: Remove incorrect hard coded cache coherrency setting (rev2)
URL:	https://patchwork.freedesktop.org/series/119485/
State:	success
Details:	https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119485v2/index.html

CI Bug Log - changes from CI_DRM_13309 -> Patchwork_119485v2

Summary

SUCCESS

No regressions found.

External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119485v2/index.html

Participating hosts (43 -> 41)

Missing (2): fi-kbl-soraka fi-snb-2520m

Known issues

Here are the changes found in Patchwork_119485v2 that come from known issues:

IGT changes

Issues hit

• igt@i915_module_load@load:

  • bat-mtlp-6: PASS -> ABORT (i915#8141)

  • bat-mtlp-8: PASS -> ABORT (i915#8141)

• igt@i915_pm_backlight@basic-brightness@edp-1:

  • bat-rplp-1: NOTRUN -> ABORT (i915#7077)

• igt@i915_selftest@live@gt_heartbeat:

  • fi-apl-guc: PASS -> DMESG-FAIL (i915#5334)

• igt@i915_selftest@live@slpc:

  • bat-rpls-1: PASS -> DMESG-WARN (i915#6367)

• igt@kms_chamelium_hpd@common-hpd-after-suspend:

  • bat-dg2-11: NOTRUN -> SKIP (i915#7828)

Possible fixes

• igt@i915_selftest@live@requests:
  • bat-dg2-11: ABORT (i915#7913) -> PASS

Warnings

• igt@i915_module_load@load:

  • bat-adlp-11: DMESG-WARN (i915#4423) -> ABORT (i915#4423)

• igt@kms_setmode@basic-clone-single-crtc:

  • bat-rplp-1: ABORT (i915#4579 / i915#8260) -> SKIP (i915#3555 / i915#4579)

Build changes

• Linux: CI_DRM_13309 -> Patchwork_119485v2

CI-20190529: 20190529
CI_DRM_13309: af67b02abf56a5018cd885c94d7611241052e98f @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7346: 29302a0d57bcf10cb553f5d7ff5bb99166a19bba @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_119485v2: af67b02abf56a5018cd885c94d7611241052e98f @ git://anongit.freedesktop.org/gfx-ci/linux

Linux commits

80c265f2adc1 drm/i915/gt: Remove incorrect hard coded cache coherrency setting