> -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Ville Syrjälä > Sent: Friday, June 9, 2023 1:06 AM > To: Jani Nikula <jani.nikula@xxxxxxxxxxxxxxx> > Cc: intel-gfx@xxxxxxxxxxxxxxxxxxxxx > Subject: Re: [PATCH v2 2/7] drm/i915: Introduce device info port_mask > > On Fri, Jun 02, 2023 at 05:11:45PM +0300, Jani Nikula wrote: > > On Wed, 31 May 2023, Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx> wrote: > > > @@ -556,6 +590,16 @@ static const struct intel_display_device_info > > > gen11_display = { > > > > > > static const struct intel_display_device_info tgl_display = { > > > XE_D_DISPLAY, > > > + > > > + .__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | > > > +BIT(PORT_C) | > > > > Where does port C come from? > > From the spec. > > > It's not in intel_setup_outputs() > > currently. > > Hmm. Based on the history there seems to be some kind of screwup in the combo > PHY code wrt. ports that are not actually present in the SKU. The spec says we > should rely on hpd to figure out what ports are actually present. So looks like the > combo PHY code needs quite a bit of redesign :( I guess I'll leave this out until then. > This info on what ports are physically present is advertised via VBT currently. But based on spec, we can declare the capability at setup and intel_ddi_init should check VBT and proceed. > > > + BIT(PORT_TC1) | BIT(PORT_TC2) | BIT(PORT_TC3) | BIT(PORT_TC4) > | > > > +BIT(PORT_TC5) | BIT(PORT_TC5), > > > > TC5 duplicated, TC6 missing. Yeah some typo here. With the above addressed, this change looks good to me. Reviewed-by: Uma Shankar <uma.shankar@xxxxxxxxx> > > > > BR, > > Jani. > > > > -- > > Jani Nikula, Intel Open Source Graphics Center > > -- > Ville Syrjälä > Intel