✓ Fi.CI.BAT: success for drm/i915/psr: Restore HSW/BDW PSR1 (rev2)

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Title: Project List - Patchwork
Patch Details
Series:drm/i915/psr: Restore HSW/BDW PSR1 (rev2)
URL:https://patchwork.freedesktop.org/series/116814/
State:success
Details:https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116814v2/index.html

CI Bug Log - changes from CI_DRM_13256 -> Patchwork_116814v2

Summary

SUCCESS

No regressions found.

External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116814v2/index.html

Participating hosts (36 -> 36)

No changes in participating hosts

Known issues

Here are the changes found in Patchwork_116814v2 that come from known issues:

IGT changes

Issues hit

Possible fixes

{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).

Build changes

CI-20190529: 20190529
CI_DRM_13256: be85dc2d44c075230eec4366e27bc1fe75ee59ff @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7322: 2dd77d6d827a308caae49ce3eba759c2bab394ed @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_116814v2: be85dc2d44c075230eec4366e27bc1fe75ee59ff @ git://anongit.freedesktop.org/gfx-ci/linux

Linux commits

633d600ce794 drm/i915/psr: Re-enable PSR1 on hsw/bdw
e9ec8d454230 drm/i915/psr: Allow PSR with sprite enabled on hsw/bdw
7d4d721579a0 drm/i915/psr: Don't skip both TP1 and TP2/3 on hsw/bdw
76adecc44bf0 drm/i915/psr: Do no mask display register writes on hsw/bdw
2d46fca0adf5 drm/i915/psr: Implement WaPsrDPRSUnmaskVBlankInSRD:hsw
e763497276d0 drm/i915/psr: Implement WaPsrDPAMaskVBlankInSRD:hsw
e8a28d75b930 drm/i915/psr: Restore PSR interrupt handler for HSW
23e1a92468b1 drm/i915/psr: HSW/BDW have no PSR2
0e44aa85bdb2 drm/i915/psr: Bring back HSW/BDW PSR AUX CH registers/setup
9b0d6e188577 drm/i915/psr: Reintroduce HSW PSR1 registers
dc88d5db5c0d drm/i915/psr: Wrap PSR1 register with functions
9674d99df2b3 drm/i915/psr: Fix BDW PSR AUX CH data register offsets
7d1de593fccc drm/i915: Re-init clock gating on coming out of PC8+


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