== Series Details == Series: drm/i915: Load LUTs with DSB (rev2) URL : https://patchwork.freedesktop.org/series/113042/ State : warning == Summary == Error: dim checkpatch failed 35a5ec5257a0 drm/i915: Constify LUT entries in checker 018aa36a0ba6 drm/i915/dsb: Use non-locked register access 7f1c6c879158 drm/i915/dsb: Dump the DSB command buffer when DSB fails -:34: CHECK:SPACING: spaces preferred around that '+' (ctx:VxV) #34: FILE: drivers/gpu/drm/i915/display/intel_dsb.c:108: + i * 4, buf[i], buf[i+1], buf[i+2], buf[i+3]); ^ -:34: CHECK:SPACING: spaces preferred around that '+' (ctx:VxV) #34: FILE: drivers/gpu/drm/i915/display/intel_dsb.c:108: + i * 4, buf[i], buf[i+1], buf[i+2], buf[i+3]); ^ -:34: CHECK:SPACING: spaces preferred around that '+' (ctx:VxV) #34: FILE: drivers/gpu/drm/i915/display/intel_dsb.c:108: + i * 4, buf[i], buf[i+1], buf[i+2], buf[i+3]); ^ total: 0 errors, 0 warnings, 3 checks, 46 lines checked 0a4d1ee3a7dc drm/i915/dsb: Define more DSB bits 38081eebc4d0 drm/i915/dsb: Define the contents of some intstructions bit better 9f17b48cfa11 drm/i915/dsb: Avoid corrupting the first register write c42dd35aefce drm/i915/dsb: Don't use indexed writes when byte enables are not all set 3fbf457bbf91 drm/i915/dsb: Introduce intel_dsb_noop() dac21505a69f drm/i915/dsb: Introduce intel_dsb_reg_write_masked() 31801d2a8474 drm/i915/dsb: Add support for non-posted DSB registers writes 855a48b16b6a drm/i915/dsb: Don't use DSB to load the LUTs during full modeset 2c4cd85c5f78 drm/i915/dsb: Load LUTs using the DSB during vblank cfe38d031292 drm/i915/dsb: Use non-posted register writes for legacy LUT dd012e35d761 drm/i915/dsb: Evade transcoder undelayed vblank when using DSB 941cfcdee747 drm/i915: Introduce skl_watermark_max_latency() 2fb1138ee512 drm/i915: Introudce intel_crtc_scanline_to_hw() 952b6004f60c drm/i915/dsb: Use DEwake to combat PkgC latency d88af6de0a61 drm/i915/dsb: Re-instate DSB for LUT updates c745478e5c12 drm/i915: Do state check for color management changes
