Re: [PATCH] drm/i915: Avoid flicker with horizontal panning on 830GM

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Am 02.09.2013 16:18, schrieb Daniel Vetter:
Hm, I've probably botched the watermarks again. Can you please retest with
the below diff?

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index dfdc7ad..b667ff0 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -1064,6 +1064,8 @@ static unsigned long intel_calculate_wm(unsigned long clock_in_khz,

  	DRM_DEBUG_KMS("FIFO watermark level: %ld\n", wm_size);

+	wm_size = 0;
+
  	/* Don't promote wm_size to unsigned... */
  	if (wm_size>  (long)wm->max_wm)
  		wm_size = wm->max_wm;
As this didn't work either, could you point me to a documentation of the 830M so I could have a look myself? Unfortunately, I did not find anything appropriate, only an overall description of the chipset that lists all the RAM/addressing related registers and a high-level description of the gpu features, but nothing detailed on the 2D graphics and VGA-related registers.

Thanks,
    Thomas

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