On Mon, 29 May 2023, Dan Carpenter <dan.carpenter@xxxxxxxxxx> wrote: > Hi Jani, > > kernel test robot noticed the following build warnings: Thanks, v2 already on the list: https://patchwork.freedesktop.org/patch/msgid/20230526172218.1597394-1-jani.nikula@xxxxxxxxx > > url: https://github.com/intel-lab-lkp/linux/commits/Jani-Nikula/drm-i915-plane-warn-on-non-zero-plane-offset/20230527-003951 > base: git://anongit.freedesktop.org/drm/drm-tip drm-tip > patch link: https://lore.kernel.org/r/0988d237e56c56568f035053da8e2e2308a17d3a.1685119007.git.jani.nikula%40intel.com > patch subject: [PATCH 01/15] drm/i915/plane: warn on non-zero plane offset > config: x86_64-randconfig-m031-20230526 (https://download.01.org/0day-ci/archive/20230528/202305280453.8yzCMS2i-lkp@xxxxxxxxx/config) > compiler: gcc-11 (Debian 11.3.0-12) 11.3.0 > > If you fix the issue, kindly add following tag where applicable > | Reported-by: kernel test robot <lkp@xxxxxxxxx> > | Reported-by: Dan Carpenter <error27@xxxxxxxxx> > | Closes: https://lore.kernel.org/r/202305280453.8yzCMS2i-lkp@xxxxxxxxx/ > > smatch warnings: > drivers/gpu/drm/i915/display/i9xx_plane.c:1040 i9xx_get_initial_plane_config() error: uninitialized symbol 'offset'. > > vim +/offset +1040 drivers/gpu/drm/i915/display/i9xx_plane.c > > 2a3014490cd18a Dave Airlie 2021-02-05 974 void > 2a3014490cd18a Dave Airlie 2021-02-05 975 i9xx_get_initial_plane_config(struct intel_crtc *crtc, > 2a3014490cd18a Dave Airlie 2021-02-05 976 struct intel_initial_plane_config *plane_config) > 2a3014490cd18a Dave Airlie 2021-02-05 977 { > 2a3014490cd18a Dave Airlie 2021-02-05 978 struct drm_device *dev = crtc->base.dev; > 2a3014490cd18a Dave Airlie 2021-02-05 979 struct drm_i915_private *dev_priv = to_i915(dev); > 2a3014490cd18a Dave Airlie 2021-02-05 980 struct intel_plane *plane = to_intel_plane(crtc->base.primary); > 2a3014490cd18a Dave Airlie 2021-02-05 981 enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; > 2a3014490cd18a Dave Airlie 2021-02-05 982 enum pipe pipe; > 2a3014490cd18a Dave Airlie 2021-02-05 983 u32 val, base, offset; > 2a3014490cd18a Dave Airlie 2021-02-05 984 int fourcc, pixel_format; > 2a3014490cd18a Dave Airlie 2021-02-05 985 unsigned int aligned_height; > 2a3014490cd18a Dave Airlie 2021-02-05 986 struct drm_framebuffer *fb; > 2a3014490cd18a Dave Airlie 2021-02-05 987 struct intel_framebuffer *intel_fb; > 2a3014490cd18a Dave Airlie 2021-02-05 988 > 2a3014490cd18a Dave Airlie 2021-02-05 989 if (!plane->get_hw_state(plane, &pipe)) > 2a3014490cd18a Dave Airlie 2021-02-05 990 return; > 2a3014490cd18a Dave Airlie 2021-02-05 991 > 2a3014490cd18a Dave Airlie 2021-02-05 992 drm_WARN_ON(dev, pipe != crtc->pipe); > 2a3014490cd18a Dave Airlie 2021-02-05 993 > 2a3014490cd18a Dave Airlie 2021-02-05 994 intel_fb = kzalloc(sizeof(*intel_fb), GFP_KERNEL); > 2a3014490cd18a Dave Airlie 2021-02-05 995 if (!intel_fb) { > 2a3014490cd18a Dave Airlie 2021-02-05 996 drm_dbg_kms(&dev_priv->drm, "failed to alloc fb\n"); > 2a3014490cd18a Dave Airlie 2021-02-05 997 return; > 2a3014490cd18a Dave Airlie 2021-02-05 998 } > 2a3014490cd18a Dave Airlie 2021-02-05 999 > 2a3014490cd18a Dave Airlie 2021-02-05 1000 fb = &intel_fb->base; > 2a3014490cd18a Dave Airlie 2021-02-05 1001 > 2a3014490cd18a Dave Airlie 2021-02-05 1002 fb->dev = dev; > 2a3014490cd18a Dave Airlie 2021-02-05 1003 > 2a3014490cd18a Dave Airlie 2021-02-05 1004 val = intel_de_read(dev_priv, DSPCNTR(i9xx_plane)); > 2a3014490cd18a Dave Airlie 2021-02-05 1005 > 005e95377249cb Matt Roper 2021-03-19 1006 if (DISPLAY_VER(dev_priv) >= 4) { > 428cb15d5b0031 Ville Syrjälä 2022-01-21 1007 if (val & DISP_TILED) { > 2a3014490cd18a Dave Airlie 2021-02-05 1008 plane_config->tiling = I915_TILING_X; > 2a3014490cd18a Dave Airlie 2021-02-05 1009 fb->modifier = I915_FORMAT_MOD_X_TILED; > 2a3014490cd18a Dave Airlie 2021-02-05 1010 } > 2a3014490cd18a Dave Airlie 2021-02-05 1011 > 428cb15d5b0031 Ville Syrjälä 2022-01-21 1012 if (val & DISP_ROTATE_180) > 2a3014490cd18a Dave Airlie 2021-02-05 1013 plane_config->rotation = DRM_MODE_ROTATE_180; > 2a3014490cd18a Dave Airlie 2021-02-05 1014 } > 2a3014490cd18a Dave Airlie 2021-02-05 1015 > 2a3014490cd18a Dave Airlie 2021-02-05 1016 if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B && > 428cb15d5b0031 Ville Syrjälä 2022-01-21 1017 val & DISP_MIRROR) > 2a3014490cd18a Dave Airlie 2021-02-05 1018 plane_config->rotation |= DRM_MODE_REFLECT_X; > 2a3014490cd18a Dave Airlie 2021-02-05 1019 > 428cb15d5b0031 Ville Syrjälä 2022-01-21 1020 pixel_format = val & DISP_FORMAT_MASK; > 2a3014490cd18a Dave Airlie 2021-02-05 1021 fourcc = i9xx_format_to_fourcc(pixel_format); > 2a3014490cd18a Dave Airlie 2021-02-05 1022 fb->format = drm_format_info(fourcc); > 2a3014490cd18a Dave Airlie 2021-02-05 1023 > 2a3014490cd18a Dave Airlie 2021-02-05 1024 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { > 2a3014490cd18a Dave Airlie 2021-02-05 1025 offset = intel_de_read(dev_priv, DSPOFFSET(i9xx_plane)); > 428cb15d5b0031 Ville Syrjälä 2022-01-21 1026 base = intel_de_read(dev_priv, DSPSURF(i9xx_plane)) & DISP_ADDR_MASK; > 005e95377249cb Matt Roper 2021-03-19 1027 } else if (DISPLAY_VER(dev_priv) >= 4) { > 2a3014490cd18a Dave Airlie 2021-02-05 1028 if (plane_config->tiling) > 2a3014490cd18a Dave Airlie 2021-02-05 1029 offset = intel_de_read(dev_priv, > 2a3014490cd18a Dave Airlie 2021-02-05 1030 DSPTILEOFF(i9xx_plane)); > 2a3014490cd18a Dave Airlie 2021-02-05 1031 else > 2a3014490cd18a Dave Airlie 2021-02-05 1032 offset = intel_de_read(dev_priv, > 2a3014490cd18a Dave Airlie 2021-02-05 1033 DSPLINOFF(i9xx_plane)); > 428cb15d5b0031 Ville Syrjälä 2022-01-21 1034 base = intel_de_read(dev_priv, DSPSURF(i9xx_plane)) & DISP_ADDR_MASK; > 2a3014490cd18a Dave Airlie 2021-02-05 1035 } else { > 2a3014490cd18a Dave Airlie 2021-02-05 1036 base = intel_de_read(dev_priv, DSPADDR(i9xx_plane)); > > offset not initialized on this path. > > 2a3014490cd18a Dave Airlie 2021-02-05 1037 } > 2a3014490cd18a Dave Airlie 2021-02-05 1038 plane_config->base = base; > 2a3014490cd18a Dave Airlie 2021-02-05 1039 > 40c3d9e9221e23 Jani Nikula 2023-05-26 @1040 drm_WARN_ON(&dev_priv->drm, offset != 0); -- Jani Nikula, Intel Open Source Graphics Center