> -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Ville Syrjala > Sent: Thursday, April 13, 2023 10:19 PM > To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx > Cc: dri-devel@xxxxxxxxxxxxxxxxxxxxx > Subject: [PATCH v2 2/7] drm/i915: Expose crtc CTM property on ilk/snb > > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > The ilk/snb code is internally fully capable of handling the CTM property, so expose > it. > > Note that we still choose not to expose DEGAMMA_LUT though. > The hardware is capable if degamma or gamma, but not both similtanously due to Nit: Typo in "simultaneously" Looks Good to me. Reviewed-by: Uma Shankar <uma.shankar@xxxxxxxxx> > lack of the split gamma mode. Exposing both LUTs might encourage userspace to try > enabling both at the same time. > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/display/intel_color.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_color.c > b/drivers/gpu/drm/i915/display/intel_color.c > index 07f1afe1d406..4fc16cac052d 100644 > --- a/drivers/gpu/drm/i915/display/intel_color.c > +++ b/drivers/gpu/drm/i915/display/intel_color.c > @@ -3473,7 +3473,7 @@ void intel_color_crtc_init(struct intel_crtc *crtc) > > gamma_lut_size = INTEL_INFO(i915)->display.color.gamma_lut_size; > degamma_lut_size = INTEL_INFO(i915)->display.color.degamma_lut_size; > - has_ctm = degamma_lut_size != 0; > + has_ctm = DISPLAY_VER(i915) >= 5 && !IS_VALLEYVIEW(i915); > > /* > * "DPALETTE_A: NOTE: The 8-bit (non-10-bit) mode is the > -- > 2.39.2
