Multiple CI tests fails with forcewake timeouts. Disabling power gating for render and media solves the issue. References: https://gitlab.freedesktop.org/drm/intel/-/issues/4983 Signed-off-by: Andrzej Hajda <andrzej.hajda@xxxxxxxxx> --- drivers/gpu/drm/i915/gt/intel_rc6.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c b/drivers/gpu/drm/i915/gt/intel_rc6.c index 0819576ffeb5df..c405b209e47922 100644 --- a/drivers/gpu/drm/i915/gt/intel_rc6.c +++ b/drivers/gpu/drm/i915/gt/intel_rc6.c @@ -126,6 +126,9 @@ static void gen11_rc6_enable(struct intel_rc6 *rc6) pg_enable = GEN9_MEDIA_PG_ENABLE | GEN11_MEDIA_SAMPLER_PG_ENABLE; + /* Testing */ + else if (IS_ADLS_RPLS(gt->i915)) + pg_enable = 0; else pg_enable = GEN9_RENDER_PG_ENABLE | -- 2.34.1
