== Series Details == Series: drm/i915: Use REG_BIT() & co. for AUX CH registers URL : https://patchwork.freedesktop.org/series/117533/ State : warning == Summary == Error: dim checkpatch failed 7101057c8957 drm/i915: Use REG_BIT() & co. for AUX CH registers -:120: WARNING:LONG_LINE_COMMENT: line length of 120 exceeds 100 columns #120: FILE: drivers/gpu/drm/i915/display/intel_dp_aux_regs.h:62: +#define DP_AUX_CH_CTL_TIME_OUT_MAX REG_FIELD_PREP(DP_AUX_CH_CTL_TIME_OUT_MASK, 3) /* Varies per platform */ -:125: WARNING:LONG_LINE: line length of 101 exceeds 100 columns #125: FILE: drivers/gpu/drm/i915/display/intel_dp_aux_regs.h:67: +#define DP_AUX_CH_CTL_PRECHARGE_2US(x) REG_FIELD_PREP(DP_AUX_CH_CTL_PRECHARGE_2US_MASK, (x)) -:140: WARNING:LONG_LINE: line length of 109 exceeds 100 columns #140: FILE: drivers/gpu/drm/i915/display/intel_dp_aux_regs.h:82: +#define DP_AUX_CH_CTL_FW_SYNC_PULSE_SKL(c) REG_FIELD_PREP(DP_AUX_CH_CTL_FW_SYNC_PULSE_SKL_MASK, (c) - 1) -:142: WARNING:LONG_LINE: line length of 106 exceeds 100 columns #142: FILE: drivers/gpu/drm/i915/display/intel_dp_aux_regs.h:84: +#define DP_AUX_CH_CTL_SYNC_PULSE_SKL(c) REG_FIELD_PREP(DP_AUX_CH_CTL_SYNC_PULSE_SKL_MASK, (c) - 1) total: 0 errors, 4 warnings, 0 checks, 148 lines checked
