> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of
> Radhakrishna Sripada
> Sent: Saturday, May 6, 2023 5:16 AM
> To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: Roper, Matthew D <matthew.d.roper@xxxxxxxxx>
> Subject: [PATCH] drm/i915/mtl: Fix the wa number for
> Wa_22016670082
>
> Fixes the right lineage number for the workaround.
>
> Fixes: a7fa1537b791 ("drm/i915/mtl: Implement Wa_14019141245")
> Cc: Matt Roper <matthew.d.roper@xxxxxxxxx>
> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index ad9e7f49a6fa..786349e95487 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -1699,7 +1699,7 @@ xelpg_gt_workarounds_init(struct intel_gt *gt,
> struct i915_wa_list *wal)
> wa_mcr_write_or(wal, RENDER_MOD_CTRL, FORCE_MISS_FTLB);
> wa_mcr_write_or(wal, COMP_MOD_CTRL, FORCE_MISS_FTLB);
>
> - /* Wa_14019141245 */
> + /* Wa_22016670082 */
Lineage number looks correct to me. Thanks.
Reviewed-by: Tejas Upadhyay <tejas.upadhyay@xxxxxxxxx>
> wa_write_or(wal, GEN12_SQCNT1, GEN12_STRICT_RAR_ENABLE);
>
> if (IS_MTL_GRAPHICS_STEP(gt->i915, M, STEP_A0, STEP_B0) ||
> --
> 2.34.1
