On Mon, Sep 02, 2013 at 03:58:59PM +0200, Thomas Richter wrote:
> Hi Daniel,
>
> > I've just looked at the docs and they only mention that the base address
> > must be pixel aligned. But it could very well be that the watermarks are a
> > bit off for your chipset. The below quick hack should test this theory.
> > -Daniel
> >
> >
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index dfdc7ad..990b1f4 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -1673,7 +1673,7 @@ static void i830_update_wm(struct drm_device *dev)
> > dev_priv->display.get_fifo_size(dev, 0),
> > 4, latency_ns);
> > fwater_lo = I915_READ(FW_BLC)& ~0xfff;
> > - fwater_lo |= (3<<8) | planea_wm;
> > + fwater_lo |= (3<<8) | 0;
> >
> > DRM_DEBUG_KMS("Setting FIFO watermarks - A: %d\n", planea_wm);
> >
> Checked with the above modifications. Unfortunately, the result is
> negative. With the above modifications and my changes commented out, the
> screen flickers in normal state (without panning) but in a different
> way: With the above enabled, you get a rather irregular almost
> pseudo-random flicker, and not the 60/30Hz flicker I see when panning
> horizontally. If I add horizontal panning, then I also get this
> irregular flicker, except when scrolling to the "forbidden positions" at
> which I get the regular hi-frequency flicker again.
>
> However, now that I checked closer, I found that my patch has also a
> drawback, namely the hardware scroll position and the requested scroll
> position disagrees, i.e. the mouse pointer is not exactly where it
> should be, i.e. the mouse pointer hot-spot is off.
I suppose you could fix up the cursor position in the kernel to take into
account the adjustment. But that's a bit iffy in my opinion since that
makes big assumptions about what the user is intending to do with the the
cursor. Ie. the user could just want to use the cursor to show some overlay
at a fixed position on the display.
> Is there a way to indicate the calling method what the actual
> panning/scroll position is if it is different from the requested position?
I guess you could update the crtc->x/y info and user space could then
read them out after each setcrtc ioctl. Or you could simply hardcode the
knowledge of this restriction to the ddx.
Or maybe you could just return an error for setcrtc when the alignment
is off. Not sure how the userspace will react to that though. It might
still set the cursor to the wrong position.
>
> Is there a different method to scroll the screen than to adjust the
> screen origin? Old hardware had not only a screen pointer, but also a
> pixel-offset (horizontal scroll) register. Is there something like this
> on the 830M to work around the observed trouble?
DSPADDR is the only register for this purpose.
>
> Greetings,
> Thomas
>
> PS: A closer inspection shows that the screen flickers if the panning
> position x has the property that (x mod 16) != 0. Strange enough.
Does it depend on the bpp?
--
Ville Syrjälä
Intel OTC
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