On Fri, Mar 31, 2023 at 03:46:06PM +0530, Ankit Nautiyal wrote:
> Common function to get the sink format for a given mode for DP.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@xxxxxxxxx>
Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 30 ++++++++++++-------------
> 1 file changed, 15 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index ce9384a0d153..352b5fbd805a 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -936,17 +936,25 @@ static int intel_dp_output_bpp(enum intel_output_format output_format, int bpp)
> return bpp;
> }
>
> +static enum intel_output_format
> +intel_dp_sink_format(struct intel_connector *connector,
> + const struct drm_display_mode *mode)
> +{
> + const struct drm_display_info *info = &connector->base.display_info;
> +
> + if (drm_mode_is_420_only(info, mode))
> + return INTEL_OUTPUT_FORMAT_YCBCR420;
> +
> + return INTEL_OUTPUT_FORMAT_RGB;
> +}
> +
> static int
> intel_dp_mode_min_output_bpp(struct intel_connector *connector,
> const struct drm_display_mode *mode)
> {
> - const struct drm_display_info *info = &connector->base.display_info;
> enum intel_output_format output_format, sink_format;
>
> - if (drm_mode_is_420_only(info, mode))
> - sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
> - else
> - sink_format = INTEL_OUTPUT_FORMAT_RGB;
> + sink_format = intel_dp_sink_format(connector, mode);
>
> output_format = intel_dp_output_format(connector, sink_format);
>
> @@ -1018,7 +1026,6 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
> struct intel_dp *intel_dp = intel_attached_dp(connector);
> const struct drm_display_info *info = &connector->base.display_info;
> enum drm_mode_status status;
> - bool ycbcr_420_only;
> enum intel_output_format sink_format;
>
> /* If PCON supports FRL MODE, check FRL bandwidth constraints */
> @@ -1044,12 +1051,7 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
> target_clock > intel_dp->dfp.max_dotclock)
> return MODE_CLOCK_HIGH;
>
> - ycbcr_420_only = drm_mode_is_420_only(info, mode);
> -
> - if (ycbcr_420_only)
> - sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
> - else
> - sink_format = INTEL_OUTPUT_FORMAT_RGB;
> + sink_format = intel_dp_sink_format(connector, mode);
>
> /* Assume 8bpc for the DP++/HDMI/DVI TMDS clock check */
> status = intel_dp_tmds_clock_valid(intel_dp, target_clock,
> @@ -2127,10 +2129,8 @@ intel_dp_compute_output_format(struct intel_encoder *encoder,
> drm_dbg_kms(&i915->drm,
> "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
> crtc_state->sink_format = INTEL_OUTPUT_FORMAT_RGB;
> - } else if (ycbcr_420_only) {
> - crtc_state->sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
> } else {
> - crtc_state->sink_format = INTEL_OUTPUT_FORMAT_RGB;
> + crtc_state->sink_format = intel_dp_sink_format(connector, adjusted_mode);
> }
>
> crtc_state->output_format = intel_dp_output_format(connector, crtc_state->sink_format);
> --
> 2.25.1
--
Ville Syrjälä
Intel
