== Series Details == Series: drm/i915/psr: Restore HSW/BDW PSR1 URL : https://patchwork.freedesktop.org/series/116814/ State : warning == Summary == Error: dim checkpatch failed 142f6d9f694b drm/i915: Re-init clock gating on coming out of PC8+ fceac0743cce drm/i915/psr: Fix BDW PSR AUX CH data register offsets -:26: WARNING:LONG_LINE_COMMENT: line length of 111 exceeds 100 columns #26: FILE: drivers/gpu/drm/i915/display/intel_psr_regs.h:84: +#define EDP_PSR_AUX_DATA(tran, i) _MMIO_TRANS2(tran, _SRD_AUX_DATA_A + (i) * 4) /* 5 registers */ total: 0 errors, 1 warnings, 0 checks, 8 lines checked f2797b5b7fb7 drm/i915/psr: Wrap PSR1 register with functions -:142: WARNING:LONG_LINE: line length of 101 exceeds 100 columns #142: FILE: drivers/gpu/drm/i915/display/intel_psr.c:1242: + intel_de_read(dev_priv, psr_ctl_reg(dev_priv, cpu_transcoder)) & EDP_PSR_ENABLE); total: 0 errors, 1 warnings, 0 checks, 208 lines checked d3088201e30c drm/i915/psr: Reintroduce HSW PSR1 registers e70295cefd48 drm/i915/psr: Bring back HSW/BDW PSR AUX CH registers/setup 40c55dcdbc37 drm/i915/psr: HSW/BDW have no PSR2 988e78a2917e drm/i915/psr: Restore PSR interrupt handler for HSW db43341eea49 drm/i915/psr: Implement WaPsrDPAMaskVBlankInSRD:hsw 2117b84e684f drm/i915/psr: Implement WaPsrDPRSUnmaskVBlankInSRD:hsw -:13: WARNING:TYPO_SPELLING: 'correspoding' may be misspelled - perhaps 'corresponding'? #13: in case it matters in some cases, and the correspoding bit ^^^^^^^^^^^^ total: 0 errors, 1 warnings, 0 checks, 20 lines checked 78f16cfafe7a drm/i915/psr: Do no mask display register writes on hsw/bdw 200f043d0bf0 drm/i915/psr: Don't skip both TP1 and TP2/3 on hsw/bdw 1b6709cbd4de drm/i915/psr: Allow PSR with sprite enabled on hsw/bdw 41a11c91c60f drm/i915/psr: Re-enable PSR1 on hdw/bdw
