> -----Original Message-----
> From: Deak, Imre <imre.deak@xxxxxxxxx>
> Sent: Tuesday, April 18, 2023 4:34 PM
> To: Kandpal, Suraj <suraj.kandpal@xxxxxxxxx>
> Cc: intel-gfx@xxxxxxxxxxxxxxxxxxxxx; Nikula, Jani <jani.nikula@xxxxxxxxx>
> Subject: Re: [PATCH v4] drm/i915/display: Increase AUX timeout for Type-C
>
> On Tue, Apr 18, 2023 at 04:24:54PM +0530, Suraj Kandpal wrote:
> > Type-C PHYs are taking longer than expected for Aux IO Power Enabling.
> > Workaround: Increase the timeout.
> >
> > ---v2
> > -change style on how we mention WA [Ankit] -fix bat error by creating
> > new func that is only called for aux power well scenarios so we can
> > avoid null pointer error as it is called everywhere.
> >
> > --v3
> > -Add non-default enable_timeout to power well descriptor which avoids
> > adding more platform checks [Imre]
> >
> > --v4
> > -Remove Bspec link from top to bottom remove WA link from commit put
> > it on comment [Jani] -enable_timeout in ms and add .fixed_enable_delay
> > too [Imre]
> >
> > Bspec: 55480
> >
> > Cc: Jani Nikula <jani.nikula@xxxxxxxxx>
> > Cc: Imre Deak <imre.deak@xxxxxxxxx>
> > Signed-off-by: Suraj Kandpal <suraj.kandpal@xxxxxxxxx>
> > ---
> > .../gpu/drm/i915/display/intel_display_power_map.c | 11 +++++++++++
> > .../gpu/drm/i915/display/intel_display_power_well.c | 3 ++-
> > .../gpu/drm/i915/display/intel_display_power_well.h | 2 ++
> > 3 files changed, 15 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_power_map.c
> > b/drivers/gpu/drm/i915/display/intel_display_power_map.c
> > index 6645eb1911d8..f0d51a30430a 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_power_map.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_power_map.c
> > @@ -1385,6 +1385,17 @@ static const struct i915_power_well_desc
> xelpd_power_wells_main[] = {
> > ),
> > .ops = &icl_aux_power_well_ops,
> > .fixed_enable_delay = true,
> > + }, {
> > + .instances = &I915_PW_INSTANCES(
> > + I915_PW("AUX_USBC1", &tgl_pwdoms_aux_usbc1,
> .hsw.idx = TGL_PW_CTL_IDX_AUX_TC1),
> > + I915_PW("AUX_USBC2", &tgl_pwdoms_aux_usbc2,
> .hsw.idx = TGL_PW_CTL_IDX_AUX_TC2),
> > + I915_PW("AUX_USBC3", &tgl_pwdoms_aux_usbc3,
> .hsw.idx = TGL_PW_CTL_IDX_AUX_TC3),
> > + I915_PW("AUX_USBC4", &tgl_pwdoms_aux_usbc4,
> .hsw.idx = TGL_PW_CTL_IDX_AUX_TC4),
> > + ),
>
> Instead of duplicating the above 4 power wells the change should move them
> to this group, as in the diff I provided.
>
You mean add the enable timeout in this instance itself
{
.instances = &I915_PW_INSTANCES(
I915_PW("AUX_A", &icl_pwdoms_aux_a, .hsw.idx = ICL_PW_CTL_IDX_AUX_A),
I915_PW("AUX_B", &icl_pwdoms_aux_b, .hsw.idx = ICL_PW_CTL_IDX_AUX_B),
I915_PW("AUX_C", &icl_pwdoms_aux_c, .hsw.idx = ICL_PW_CTL_IDX_AUX_C),
I915_PW("AUX_D", &icl_pwdoms_aux_d, .hsw.idx = XELPD_PW_CTL_IDX_AUX_D),
I915_PW("AUX_E", &icl_pwdoms_aux_e, .hsw.idx = XELPD_PW_CTL_IDX_AUX_E),
I915_PW("AUX_USBC1", &tgl_pwdoms_aux_usbc1, .hsw.idx = TGL_PW_CTL_IDX_AUX_TC1),
I915_PW("AUX_USBC2", &tgl_pwdoms_aux_usbc2, .hsw.idx = TGL_PW_CTL_IDX_AUX_TC2),
I915_PW("AUX_USBC3", &tgl_pwdoms_aux_usbc3, .hsw.idx = TGL_PW_CTL_IDX_AUX_TC3),
I915_PW("AUX_USBC4", &tgl_pwdoms_aux_usbc4, .hsw.idx = TGL_PW_CTL_IDX_AUX_TC4),
),
.ops = &icl_aux_power_well_ops,
.fixed_enable_delay = true,
},
Regards,
Suraj Kandpal
> > + .ops = &icl_aux_power_well_ops,
> > + .fixed_enable_delay = true,
> > + /* WA_14017248603: adlp */
> > + .enable_timeout = 500,
> > }, {
> > .instances = &I915_PW_INSTANCES(
> > I915_PW("AUX_TBT1", &icl_pwdoms_aux_tbt1,
> .hsw.idx =
> > TGL_PW_CTL_IDX_AUX_TBT1), diff --git
> > a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> > b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> > index 62bafcbc7937..930a42c825c3 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> > @@ -253,6 +253,7 @@ static void
> hsw_wait_for_power_well_enable(struct
> > drm_i915_private *dev_priv, {
> > const struct i915_power_well_regs *regs = power_well->desc->ops-
> >regs;
> > int pw_idx = i915_power_well_instance(power_well)->hsw.idx;
> > + int timeout = power_well->desc->enable_timeout ? : 1;
> >
> > /*
> > * For some power wells we're not supposed to watch the status bit
> > for @@ -266,7 +267,7 @@ static void
> > hsw_wait_for_power_well_enable(struct drm_i915_private *dev_priv,
> >
> > /* Timeout for PW1:10 us, AUX:not specified, other PWs:20 us. */
> > if (intel_de_wait_for_set(dev_priv, regs->driver,
> > - HSW_PWR_WELL_CTL_STATE(pw_idx), 1)) {
> > + HSW_PWR_WELL_CTL_STATE(pw_idx),
> timeout)) {
> > drm_dbg_kms(&dev_priv->drm, "%s power well enable
> timeout\n",
> > intel_power_well_name(power_well));
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.h
> > b/drivers/gpu/drm/i915/display/intel_display_power_well.h
> > index ba7cb977e7c7..e494df379e6c 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_power_well.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.h
> > @@ -110,6 +110,8 @@ struct i915_power_well_desc {
> > * Thunderbolt mode.
> > */
> > u16 is_tc_tbt:1;
> > + /* Enable timeout if greater than the default 1ms */
> > + u16 enable_timeout;
> > };
> >
> > struct i915_power_well {
> > --
> > 2.25.1
> >
