On Wed, Aug 28, 2013 at 10:09:40PM +0100, Chris Wilson wrote: > On Wed, Aug 28, 2013 at 04:45:46PM -0300, Rodrigo Vivi wrote: > > Batchbuffers constructed by userspace can conditionalise their URB > > allocations through the use of the MI_SET_PREDICATE command. This > > command can read the MI_PREDICATE_RESULT_2 register to see how many > > slices are enabled on GT3, and by virtue of the result, scale their > > memory allocations to fit enabled memory. > > > > Of course, this only works if the kernel sets the appropriate bit in the > > register first. > > > > v2: Better commit subject and message by Chris Wilson. > > > > Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > > Credits-by: Yejun Guo <yejun.guo@xxxxxxxxx> > > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > > I would have written the I915_WRITE() differently but, > Reviewed-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> Queued for -next, thanks for the patch. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
