> -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Ville > Syrjala > Sent: 21 March 2023 02:04 > To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx > Subject: [PATCH 6/6] drm/i915/vrr: Allow VRR to be toggled during > fastsets > > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > Now that VRR enable/disable are called from convenient places it is trivial to > allow it to change state during fastsets. > Make it so. > > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/7542 > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/display/intel_display.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c > b/drivers/gpu/drm/i915/display/intel_display.c > index cefd9f2e1331..07743b2d2ef0 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -5849,7 +5849,8 @@ intel_pipe_config_compare(const struct > intel_crtc_state *current_config, > PIPE_CONF_CHECK_I(splitter.link_count); > PIPE_CONF_CHECK_I(splitter.pixel_overlap); > > - PIPE_CONF_CHECK_BOOL(vrr.enable); > + if (!fastset) > + PIPE_CONF_CHECK_BOOL(vrr.enable); changes LGTM. Thanks Reviewed-by: Mitul Golani <mitulkumar.ajitkumar.golani@xxxxxxxxx> > PIPE_CONF_CHECK_I(vrr.vmin); > PIPE_CONF_CHECK_I(vrr.vmax); > PIPE_CONF_CHECK_I(vrr.flipline); > -- > 2.39.2
