> -----Original Message-----
> From: Murthy, Arun R <arun.r.murthy@xxxxxxxxx>
> Sent: Monday, April 3, 2023 8:28 PM
> To: Kandpal, Suraj <suraj.kandpal@xxxxxxxxx>; intel-
> gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: Sharma, Swati2 <swati2.sharma@xxxxxxxxx>
> Subject: RE: [PATCH] drm/i915/display: Increase AUX timeout for Type-C
>
> > -----Original Message-----
> > From: Kandpal, Suraj <suraj.kandpal@xxxxxxxxx>
> > Sent: Monday, April 3, 2023 1:32 PM
> > To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> > Cc: Murthy, Arun R <arun.r.murthy@xxxxxxxxx>; Sharma, Swati2
> > <swati2.sharma@xxxxxxxxx>; Kandpal, Suraj <suraj.kandpal@xxxxxxxxx>
> > Subject: [PATCH] drm/i915/display: Increase AUX timeout for Type-C
> >
> > Type-C PHYs are taking longer than expected for Aux IO Power Enabling.
> > Workaround: Increase the timeout.
> >
> > WA: 14017271110
> > Bspec: 55480
> >
> > Signed-off-by: Suraj Kandpal <suraj.kandpal@xxxxxxxxx>
> > ---
> > .../drm/i915/display/intel_display_power_well.c | 15 +++++++++++++++
> > 1 file changed, 15 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> > b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> > index 62bafcbc7937..357617b9b725 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> > @@ -252,6 +252,7 @@ static void
> hsw_wait_for_power_well_enable(struct
> > drm_i915_private *dev_priv,
> > bool timeout_expected)
> > {
> > const struct i915_power_well_regs *regs = power_well->desc->ops-
> > >regs;
> > + enum phy phy = icl_aux_pw_to_phy(dev_priv, power_well);
> > int pw_idx = i915_power_well_instance(power_well)->hsw.idx;
> >
> > /*
> > @@ -264,6 +265,20 @@ static void
> hsw_wait_for_power_well_enable(struct
> > drm_i915_private *dev_priv,
> > return;
> > }
> >
> > + /*
> > + * WA: 14017271110
> > + * Type-C Phy are taking longer than expected for AUX IO Power
> > Enabling.
> > + * Increase timeout to 500ms.
> > + */
> > + if (IS_ALDERLAKE_P(dev_priv) && intel_phy_is_tc(dev_priv, phy)) {
> > + if (intel_de_wait_for_set(dev_priv, regs->driver,
> > +
> > HSW_PWR_WELL_CTL_STATE(pw_idx), 500)) {
> > + drm_dbg_kms(&dev_priv->drm, "%s power well
> > enable timeout\n",
> > + intel_power_well_name(power_well));
> > + return;
> > + }
> > + }
Hi,
This code block does have a return so it wont go to the next but it does make sense to compute
delay and avoid duplication of code.
Regards,
Suraj Kandpal
>
> After execution of this on success it will again execute the wait_for() for
> HSW_PWR_WELL_CTL_STATE.
> Instead can a variable 'delay' be added that can be passed to
> intel_de_wait_for_set() and this variable 'delay' can be initialized with
> corresponding value.
>
> Thanks and Regards,
> Arun R Murthy
> -------------------
> > +
> > /* Timeout for PW1:10 us, AUX:not specified, other PWs:20 us. */
> > if (intel_de_wait_for_set(dev_priv, regs->driver,
> > HSW_PWR_WELL_CTL_STATE(pw_idx), 1)) {
> > --
> > 2.25.1
