== Series Details == Series: Correction to QGV related register addresses (rev3) URL : https://patchwork.freedesktop.org/series/115473/ State : warning == Summary == Error: dim checkpatch failed a781f15196ee drm/i915/reg: fix QGV points register access offsets -:24: WARNING:LONG_LINE: line length of 101 exceeds 100 columns #24: FILE: drivers/gpu/drm/i915/i915_reg.h:7728: +#define MTL_MEM_SS_INFO_QGV_POINT_LOW(point) _MMIO(MTL_MEM_SS_INFO_QGV_POINT_OFFSET + (point) * 8) -:30: WARNING:LONG_LINE: line length of 105 exceeds 100 columns #30: FILE: drivers/gpu/drm/i915/i915_reg.h:7733: +#define MTL_MEM_SS_INFO_QGV_POINT_HIGH(point) _MMIO(MTL_MEM_SS_INFO_QGV_POINT_OFFSET + (point) * 8 + 4) total: 0 errors, 2 warnings, 0 checks, 15 lines checked 314d5d0a5010 drm/i915/reg: use the correct register to access SAGV block time
