Series: | Correction to QGV related register addresses (rev2) |
URL: | https://patchwork.freedesktop.org/series/115473/ |
State: | success |
Details: | https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/index.html |
CI Bug Log - changes from CI_DRM_12897 -> Patchwork_115473v2
Summary
SUCCESS
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/index.html
Participating hosts (36 -> 34)
Missing (2): fi-kbl-guc fi-snb-2520m
Known issues
Here are the changes found in Patchwork_115473v2 that come from known issues:
IGT changes
Issues hit
-
igt@i915_selftest@live@mman:
-
igt@i915_selftest@live@slpc:
- bat-rpls-2: NOTRUN -> DMESG-FAIL (i915#6997 / i915#7913)
Possible fixes
-
igt@i915_pm_rps@basic-api:
-
igt@i915_selftest@live@mman:
Build changes
- Linux: CI_DRM_12897 -> Patchwork_115473v2
CI-20190529: 20190529
CI_DRM_12897: 48de8fde637e7fb42e44046fbb3f33199d36ea6b @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7211: c0cc1de7b2f4041ca68960362aa55f881d416bac @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_115473v2: 48de8fde637e7fb42e44046fbb3f33199d36ea6b @ git://anongit.freedesktop.org/gfx-ci/linux
Linux commits
e004edea9813 drm/i915/reg: use the correct register to access SAGV block time
9c16d862ecd8 drm/i915/reg: fix QGV points register access offsets