✓ Fi.CI.BAT: success for drm/i915/display: Set correct voltage level for 480MHz CDCLK

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Title: Project List - Patchwork
Patch Details
Series:drm/i915/display: Set correct voltage level for 480MHz CDCLK
URL:https://patchwork.freedesktop.org/series/114752/
State:success
Details:https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114752v1/index.html

CI Bug Log - changes from CI_DRM_12820 -> Patchwork_114752v1

Summary

SUCCESS

No regressions found.

External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114752v1/index.html

Participating hosts (36 -> 29)

Missing (7): fi-kbl-soraka bat-dg1-6 bat-dg1-5 bat-dg2-8 bat-dg2-9 fi-snb-2520m bat-dg2-11

Known issues

Here are the changes found in Patchwork_114752v1 that come from known issues:

IGT changes

Issues hit

Possible fixes

Build changes

CI-20190529: 20190529
CI_DRM_12820: 92ffdc75c9bc4983024875753cf70fe5259f72ba @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7181: f44a24fe9f1948a117daf3162db53df7820f9923 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_114752v1: 92ffdc75c9bc4983024875753cf70fe5259f72ba @ git://anongit.freedesktop.org/gfx-ci/linux

Linux commits

4791f59a89da drm/i915/display: Set correct voltage level for 480MHz CDCLK


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