On Thu, Feb 23, 2023 at 04:23:00PM -0800, Matt Roper wrote:
> Xe_HP architecture already makes the CS_CTX_TIMESTAMP readable by
> userspace on all engines; there's no longer a need to add it to the
> software-managed whitelist for the non-RCS engines.
>
> Bspec: 45545
> Signed-off-by: Matt Roper <matthew.d.roper@xxxxxxxxx>
Acked-by: Gustavo Sousa <gustavo.sousa@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 11 +----------
> 1 file changed, 1 insertion(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index 0444c715998a..ee0649851a4c 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -2204,17 +2204,10 @@ static void tgl_whitelist_build(struct intel_engine_cs *engine)
> }
> }
>
> -static void xehpsdv_whitelist_build(struct intel_engine_cs *engine)
> -{
> - allow_read_ctx_timestamp(engine);
> -}
> -
> static void dg2_whitelist_build(struct intel_engine_cs *engine)
> {
> struct i915_wa_list *w = &engine->whitelist;
>
> - allow_read_ctx_timestamp(engine);
> -
> switch (engine->class) {
> case RENDER_CLASS:
> /*
> @@ -2265,8 +2258,6 @@ static void blacklist_trtt(struct intel_engine_cs *engine)
>
> static void pvc_whitelist_build(struct intel_engine_cs *engine)
> {
> - allow_read_ctx_timestamp(engine);
> -
> /* Wa_16014440446:pvc */
> blacklist_trtt(engine);
> }
> @@ -2301,7 +2292,7 @@ void intel_engine_init_whitelist(struct intel_engine_cs *engine)
> else if (IS_DG2(i915))
> dg2_whitelist_build(engine);
> else if (IS_XEHPSDV(i915))
> - xehpsdv_whitelist_build(engine);
> + ; /* none needed */
> else if (GRAPHICS_VER(i915) == 12)
> tgl_whitelist_build(engine);
> else if (GRAPHICS_VER(i915) == 11)
> --
> 2.39.1
>
