2013/8/14 Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>:
> On Tue, Aug 06, 2013 at 06:57:15PM -0300, Paulo Zanoni wrote:
>> From: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx>
>>
>> Just like irq_mask and gt_irq_mask, use it to track the status of
>> GEN6_PMIMR so we don't need to read it again every time we call
>> snb_update_pm_irq.
>>
>> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx>
>> ---
>> drivers/gpu/drm/i915/i915_drv.h | 1 +
>> drivers/gpu/drm/i915/i915_irq.c | 12 +++++++-----
>> 2 files changed, 8 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>> index 9ff09a2..b621f5e 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -1097,6 +1097,7 @@ typedef struct drm_i915_private {
>> /** Cached value of IMR to avoid reads in updating the bitfield */
>> u32 irq_mask;
>> u32 gt_irq_mask;
>> + u32 pm_irq_mask;
>>
>> struct work_struct hotplug_work;
>> bool enable_hotplug_processing;
>> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
>> index a1255da..d96bd1b 100644
>> --- a/drivers/gpu/drm/i915/i915_irq.c
>> +++ b/drivers/gpu/drm/i915/i915_irq.c
>> @@ -142,16 +142,17 @@ static void snb_update_pm_irq(struct drm_i915_private *dev_priv,
>> uint32_t interrupt_mask,
>> uint32_t enabled_irq_mask)
>> {
>> - uint32_t pmimr, new_val;
>> + uint32_t new_val;
>>
>> assert_spin_locked(&dev_priv->irq_lock);
>>
>> - pmimr = new_val = I915_READ(GEN6_PMIMR);
>> + new_val = dev_priv->pm_irq_mask;
>> new_val &= ~interrupt_mask;
>> new_val |= (~enabled_irq_mask & interrupt_mask);
>>
>> - if (new_val != pmimr) {
>> - I915_WRITE(GEN6_PMIMR, new_val);
>> + if (new_val != dev_priv->pm_irq_mask) {
>> + dev_priv->pm_irq_mask = new_val;
>> + I915_WRITE(GEN6_PMIMR, dev_priv->pm_irq_mask);
>> POSTING_READ(GEN6_PMIMR);
>> }
>> }
>> @@ -2221,8 +2222,9 @@ static void gen5_gt_irq_postinstall(struct drm_device *dev)
>> if (HAS_VEBOX(dev))
>> pm_irqs |= PM_VEBOX_USER_INTERRUPT;
>>
>> + dev_priv->pm_irq_mask = 0xffffffff;
>> I915_WRITE(GEN6_PMIIR, I915_READ(GEN6_PMIIR));
>> - I915_WRITE(GEN6_PMIMR, 0xffffffff);
>
> Same write happening at gen5_gt_irq_preinstall...
> it is already strange a gen5_ func using a GEN6 reg, but maybe we have to use this same pm_irq_mask there also...
The confusing semantics between preinstall, postinstall and uninstall
were addressed in another patch series which I sent a while ago, but I
need to resend it based on the comments I received. I'm going to do
this after I finish the work on PC8+.
For the gen5_ prefix having gen6 code: naming a function
genX_something usually means that this function runs on genX and newer
platforms, so it's acceptable to see genX+1 code there, but never
genX-1. Also, ILK/SNB/IVB/HSW share the same functions for most of the
IRQ code already.
>
>
>> + I915_WRITE(GEN6_PMIMR, dev_priv->pm_irq_mask);
>> I915_WRITE(GEN6_PMIER, pm_irqs);
>> POSTING_READ(GEN6_PMIER);
>> }
>> --
>> 1.8.1.2
>
> Anyways, feel free to use:
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
Thanks for the reviews!
>
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Paulo Zanoni
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
