On Tue, Feb 14, 2023 at 12:32:49PM +0200, Jani Nikula wrote: > On Tue, 14 Feb 2023, Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx> wrote: > > diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c > > index ef0c7f5b0ad6..8f2ebead0826 100644 > > --- a/drivers/gpu/drm/i915/display/intel_crt.c > > +++ b/drivers/gpu/drm/i915/display/intel_crt.c > > @@ -698,11 +698,11 @@ intel_crt_load_detect(struct intel_crt *crt, enum pipe pipe) > > save_vtotal = intel_de_read(dev_priv, TRANS_VTOTAL(cpu_transcoder)); > > vblank = intel_de_read(dev_priv, TRANS_VBLANK(cpu_transcoder)); > > > > - vtotal = ((save_vtotal >> 16) & 0xfff) + 1; > > - vactive = (save_vtotal & 0x7ff) + 1; > > + vtotal = REG_FIELD_GET(VTOTAL_MASK, save_vtotal) + 1; > > + vactive = REG_FIELD_GET(VACTIVE_MASK, save_vtotal) + 1; > > > > - vblank_start = (vblank & 0xfff) + 1; > > - vblank_end = ((vblank >> 16) & 0xfff) + 1; > > + vblank_start = REG_FIELD_GET(VBLANK_START_MASK, vblank) + 1; > > + vblank_end = REG_FIELD_GET(VBLANK_END_MASK, vblank) + 1; > > I forget how these are defined in bspec and if the field size grows > towards later platforms... but this widens the masks. I'm guess it'll > probably read as zero anyway, but in theory that's a functional change. Missed the fact tht this used smaller masks here for these few. But it should be all good as eveywhere else we've been using the full 16bits, so the state checker should have spotted any extra garbage in the high bits. But I'll add a note to the commit message, just in case. -- Ville Syrjälä Intel
