On Tue, 14 Feb 2023, Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx> wrote: > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > We just wrote the EDP transcoder's VTOTAL register a few lines > earlier, so instead of reading it back out again let's just > generate the same value for the transocder B/C register. > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Reviewed-by: Jani Nikula <jani.nikula@xxxxxxxxx> > --- > drivers/gpu/drm/i915/display/intel_display.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index 4210ede5e52e..894f3098d9be 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -2891,8 +2891,8 @@ static void intel_set_transcoder_timings(const struct intel_crtc_state *crtc_sta > if (IS_HASWELL(dev_priv) && cpu_transcoder == TRANSCODER_EDP && > (pipe == PIPE_B || pipe == PIPE_C)) > intel_de_write(dev_priv, TRANS_VTOTAL(pipe), > - intel_de_read(dev_priv, TRANS_VTOTAL(cpu_transcoder))); > - > + VACTIVE(crtc_vdisplay - 1) | > + VTOTAL(crtc_vtotal - 1)); > } > > static void intel_set_pipe_src_size(const struct intel_crtc_state *crtc_state) -- Jani Nikula, Intel Open Source Graphics Center
