Re: [PATCH 04/13] drm/i915/dsb: Introduce intel_dsb_finish()

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> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Ville
> Syrjala
> Sent: Wednesday, January 18, 2023 10:01 PM
> To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> Subject:  [PATCH 04/13] drm/i915/dsb: Introduce intel_dsb_finish()
> 
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> 
> Introduce a function to emits whatever commands we need at the end of the
> DSB command buffer. For the moment we only do the tail cacheline
> alignment there, but eventually we might want eg. emit an interrupt.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>

LGTM.
Reviewed-by: Animesh Manna <animesh.manna@xxxxxxxxx>

> ---
>  drivers/gpu/drm/i915/display/intel_color.c |  1 +
>  drivers/gpu/drm/i915/display/intel_dsb.c   | 11 +++++++----
>  drivers/gpu/drm/i915/display/intel_dsb.h   |  1 +
>  3 files changed, 9 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_color.c
> b/drivers/gpu/drm/i915/display/intel_color.c
> index 5d99913429b9..6d6d300fa2df 100644
> --- a/drivers/gpu/drm/i915/display/intel_color.c
> +++ b/drivers/gpu/drm/i915/display/intel_color.c
> @@ -1257,6 +1257,7 @@ static void icl_load_luts(const struct
> intel_crtc_state *crtc_state)
>  	}
> 
>  	if (crtc_state->dsb) {
> +		intel_dsb_finish(crtc_state->dsb);
>  		intel_dsb_commit(crtc_state->dsb);
>  		intel_dsb_wait(crtc_state->dsb);
>  	}
> diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c
> b/drivers/gpu/drm/i915/display/intel_dsb.c
> index 0b2faa33f204..9e25b1345927 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsb.c
> +++ b/drivers/gpu/drm/i915/display/intel_dsb.c
> @@ -199,7 +199,7 @@ void intel_dsb_reg_write(struct intel_dsb *dsb,
>  	}
>  }
> 
> -static u32 intel_dsb_align_tail(struct intel_dsb *dsb)
> +static void intel_dsb_align_tail(struct intel_dsb *dsb)
>  {
>  	u32 aligned_tail, tail;
> 
> @@ -211,8 +211,11 @@ static u32 intel_dsb_align_tail(struct intel_dsb *dsb)
>  		       aligned_tail - tail);
> 
>  	dsb->free_pos = aligned_tail / 4;
> +}
> 
> -	return aligned_tail;
> +void intel_dsb_finish(struct intel_dsb *dsb) {
> +	intel_dsb_align_tail(dsb);
>  }
> 
>  /**
> @@ -228,8 +231,8 @@ void intel_dsb_commit(struct intel_dsb *dsb)
>  	enum pipe pipe = crtc->pipe;
>  	u32 tail;
> 
> -	tail = intel_dsb_align_tail(dsb);
> -	if (tail == 0)
> +	tail = dsb->free_pos * 4;
> +	if (drm_WARN_ON(&dev_priv->drm, !IS_ALIGNED(tail,
> CACHELINE_BYTES)))
>  		return;
> 
>  	if (is_dsb_busy(dev_priv, pipe, dsb->id)) { diff --git
> a/drivers/gpu/drm/i915/display/intel_dsb.h
> b/drivers/gpu/drm/i915/display/intel_dsb.h
> index 7999199c2464..6b22499e8a5d 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsb.h
> +++ b/drivers/gpu/drm/i915/display/intel_dsb.h
> @@ -15,6 +15,7 @@ struct intel_dsb;
> 
>  struct intel_dsb *intel_dsb_prepare(struct intel_crtc *crtc,
>  				    unsigned int max_cmds);
> +void intel_dsb_finish(struct intel_dsb *dsb);
>  void intel_dsb_cleanup(struct intel_dsb *dsb);  void
> intel_dsb_reg_write(struct intel_dsb *dsb,
>  			 i915_reg_t reg, u32 val);
> --
> 2.38.2





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