This patch adds the workaround to disable IC prefetch. Original Author: Madhumitha Tolakanhalli Pradeep Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@xxxxxxxxx> --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c index c52c5f9ad9ce..47ff4ca2bd61 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c @@ -1677,6 +1677,10 @@ xelpg_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal) IS_MTL_GRAPHICS_STEP(gt->i915, P, STEP_A0, STEP_B0)) wa_mcr_write_clr(wal, SARB_CHICKEN1, COMP_CKN_IN); + /* Wa_22015279794: mtl-p[a0] */ + if (IS_MTL_GRAPHICS_STEP(gt->i915, P, STEP_A0, STEP_B0)) + wa_mcr_masked_en(wal, GEN10_CACHE_MODE_SS, + ENABLE_PREFETCH_INTO_IC); /* * Unlike older platforms, we no longer setup implicit steering here; * all MCR accesses are explicitly steered. -- 2.34.1
